Re: [PATCH v11 2/5] tty: goldfish: introduce gf_ioread32()/gf_iowrite32()

[Laurent Vivier]

Le 20/01/2022 à 09:50, Arnd Bergmann a écrit :
> On Thu, Jan 20, 2022 at 9:03 AM Laurent Vivier <laurent@xxxxxxxxx> wrote:
> > Revert
> > commit da31de35cd2f ("tty: goldfish: use __raw_writel()/__raw_readl()")
> >
> > to use accessors defined by the architecture.
> >
> > Define by default the accessor to be little-endian as we
> > have only little-endian architectures using goldfish devices.
> >
> > Signed-off-by: Laurent Vivier <laurent@xxxxxxxxx>
>
> The patch looks good, but the description seems wrong to me:
>
> Talking about "little-endian architectures" makes no sense here, the
> point is that the device was clearly defined as having little-endian
> registers, and your earlier patch broke this driver when running
> on big-endian kernels (if anyone ever tried this).
To explain why I did that:

The reference document[1] doesn't define the endianness of goldfish.

In QEMU, goldfish devices are defined with the DEVICE_NATIVE_ENDIAN flag [2], that means all the 
target architectures defined in QEMU with TARGET_WORDS_BIGENDIAN will present them as big-endian 
devices, the others as little-endian devices.

According to TARGET_WORDS_BIGENDIAN definition:

On the following QEMU target architectures (qemu-system-XXX), goldfish devices must be accessed with 
big-endian read/write:

mips, mips64, s390x, sparc, sparc64, or1k, m68k, ppc, ppc64, xtensaeb, hppa, sh4eb, microblaze

On the following QEMU target architectures, goldfish devices must be accessed with little-endian 
read/write:

arm, aarch64, alpha, avr, cris, i386, x86_64, microblazeel, mipsel, mips64el, nios2, riscv32, 
riscv64, rx, sh4, tricore, xtensa

Thanks,
Laurent

[1] https://android.googlesource.com/platform/external/qemu/+/master/docs/GOLDFISH-VIRTUAL-HARDWARE.TXT
[2] 
https://android.googlesource.com/platform/external/qemu/+/refs/heads/emu-master-dev/hw/char/goldfish_tty.c#222