Re: [PATCH v2] dt-bindings: mfd: convert to yaml Qualcomm SPMI PMIC
From: Rob Herring
Date: Fri Jan 21 2022 - 19:47:29 EST
On Tue, Jan 11, 2022 at 11:00:25PM +0100, David Heidelberg wrote:
> Convert Qualcomm SPMI PMIC binding to yaml format.
>
> Additional changes:
> - filled many missing compatibles
>
> Co-developed-by: Caleb Connolly <caleb@xxxxxxxxxxxxx>
> Signed-off-by: David Heidelberg <david@xxxxxxx>
> ---
> to pass tests correctly
> depends on patch "arm64: dts: qcom: pms405: assign device specific compatible"
>
> v2:
> - changed author to myself, kept Caleb as co-author
> - moved nodename to properties
> - add nodenames for pm* with deprecated property
> - add ^$ to pattern properties
> - dropped interrupt-names property
> - added reg prop. to the nodes which have register in nodename
> - added compatible pmx55
>
> .../bindings/mfd/qcom,spmi-pmic.txt | 93 -----------
> .../bindings/mfd/qcom,spmi-pmic.yaml | 156 ++++++++++++++++++
> 2 files changed, 156 insertions(+), 93 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.txt
> create mode 100644 Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml
> diff --git a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml
> new file mode 100644
> index 000000000000..595a22b185fd
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.yaml
> @@ -0,0 +1,156 @@
> +# SPDX-License-Identifier: GPL-2.0-only
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mfd/qcom,spmi-pmic.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm SPMI PMICs multi-function device
> +
> +description: |
> + Some Qualcomm PMICs used with the Snapdragon series SoCs are interfaced
> + to the chip via the SPMI (System Power Management Interface) bus.
> + Support for multiple independent functions are implemented by splitting the
> + 16-bit SPMI peripheral address space into 256 smaller fixed-size regions, 256 bytes
> + each. A function can consume one or more of these fixed-size register regions.
> +
> + The Qualcomm SPMI series includes the PM8941, PM8841, PMA8084, PM8998 and other
> + PMICs. These PMICs use a "QPNP" scheme through SPMI interface.
> + QPNP is effectively a partitioning scheme for dividing the SPMI extended
> + register space up into logical pieces, and set of fixed register
> + locations/definitions within these regions, with some of these regions
> + specifically used for interrupt handling.
> +
> +maintainers:
> + - Stephen Boyd <sboyd@xxxxxxxxxx>
> +
> +properties:
> + $nodename:
> + oneOf:
> + - pattern: '^pmic@.*$'
> + - pattern: '^pm(a|s)?[0-9]*@.*$'
> + deprecated: true
> +
> + compatible:
> + items:
> + - enum:
> + - qcom,pm660
> + - qcom,pm660l
> + - qcom,pm6150
> + - qcom,pm6150l
> + - qcom,pm6350
> + - qcom,pm7325
> + - qcom,pm8004
> + - qcom,pm8005
> + - qcom,pm8009
> + - qcom,pm8019
> + - qcom,pm8110
> + - qcom,pm8150
> + - qcom,pm8150b
> + - qcom,pm8150l
> + - qcom,pm8226
> + - qcom,pm8350
> + - qcom,pm8350b
> + - qcom,pm8350c
> + - qcom,pm8841
> + - qcom,pm8909
> + - qcom,pm8916
> + - qcom,pm8941
> + - qcom,pm8950
> + - qcom,pm8994
> + - qcom,pm8998
> + - qcom,pma8084
> + - qcom,pmd9635
> + - qcom,pmi8950
> + - qcom,pmi8962
> + - qcom,pmi8994
> + - qcom,pmi8998
> + - qcom,pmk8350
> + - qcom,pmm8155au
> + - qcom,pmr735a
> + - qcom,pmr735b
> + - qcom,pms405
> + - qcom,pmx55
> + - qcom,smb2351
> + - const: qcom,spmi-pmic
> +
> + reg: true
> +
> + "#address-cells":
> + const: 1
> +
> + "#size-cells":
> + const: 0
> +
> +
> +patternProperties:
> + '^(labibb|([a-z][a-z0-9]+-)?regulators)$':
> + type: object
> +
> + required:
> + - compatible
> +
> + '@[0-9a-f]+$':
> + type: object
> + description: >
> + Each child node of the PMIC represents a function of it.
> +
> + properties:
> + reg: true
> +
> + interrupts:
> + description: >
> + Interrupts are specified as a 4-tuple. For more information see
> + Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.yaml
> +
> + required:
> + - compatible
> +
> + additionalProperties: true
> +
> +required:
> + - compatible
> + - reg
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/spmi/spmi.h>
> + #include <dt-bindings/interrupt-controller/irq.h>
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> + spmi@c440000 {
> + compatible = "qcom,spmi-pmic-arb";
> + reg = <0x0c440000 0x1100>,
> + <0x0c600000 0x2000000>,
> + <0x0e600000 0x100000>,
> + <0x0e700000 0xa0000>,
> + <0x0c40a000 0x26000>;
> + reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
> + interrupt-names = "periph_irq";
> + interrupts = <GIC_SPI 481 IRQ_TYPE_LEVEL_HIGH>;
> + qcom,ee = <0>;
> + qcom,channel = <0>;
> + #address-cells = <2>;
> + #size-cells = <0>;
> + interrupt-controller;
> + #interrupt-cells = <4>;
It's preferred if you just have a minimal 'spmi' bus node rather than
something complete and probably duplicated from the "qcom,spmi-pmic-arb"
binding.
> + cell-index = <0>;
That shouldn't be valid.
> +
> + pmi8998_lsid0: pmic@2 {
> + compatible = "qcom,pmi8998", "qcom,spmi-pmic";
> + reg = <0x2 SPMI_USID>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
Would be nice to show some regulators...
> + pmi8998_gpio: gpios@c000 {
> + compatible = "qcom,pmi8998-gpio", "qcom,spmi-gpio";
> + reg = <0xc000>;
> + gpio-controller;
> + gpio-ranges = <&pmi8998_gpio 0 0 14>;
> + #gpio-cells = <2>;
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> + };
> + };
> --
> 2.34.1
>
>