Re: [PATCH] clk: si5341: fix reported clk_rate when output divider is 2

From: Stephen Boyd
Date: Mon Jan 24 2022 - 22:15:43 EST


Quoting Adam Wujek (2021-12-03 06:12:07)
> SI5341_OUT_CFG_RDIV_FORCE2 shall be checked first to distinguish whether
> a divider for a given output is set to 2 (SI5341_OUT_CFG_RDIV_FORCE2
> is set) or the output is disabled (SI5341_OUT_CFG_RDIV_FORCE2 not set,
> SI5341_OUT_R_REG is set 0).
> Before the change, divider set to 2 (SI5341_OUT_R_REG set to 0) was
> interpreted as output is disabled.
>
> Signed-off-by: Adam Wujek <dev_public@xxxxxxxx>
> ---

Applied to clk-next