[PATCH 03/10] rtc: pcf2127: adapt for alarm registers at any offset

From: Hugo Villeneuve
Date: Tue Jan 25 2022 - 15:00:47 EST


From: Hugo Villeneuve <hvilleneuve@xxxxxxxxxxxx>

This will simplify the implementation of new variants into this driver.

Signed-off-by: Hugo Villeneuve <hvilleneuve@xxxxxxxxxxxx>
---
drivers/rtc/rtc-pcf2127.c | 42 ++++++++++++++++++++++-----------------
1 file changed, 24 insertions(+), 18 deletions(-)

diff --git a/drivers/rtc/rtc-pcf2127.c b/drivers/rtc/rtc-pcf2127.c
index 144b4da8d7f1..7a13a34eb21b 100644
--- a/drivers/rtc/rtc-pcf2127.c
+++ b/drivers/rtc/rtc-pcf2127.c
@@ -56,11 +56,14 @@
/* Time and date registers bits */
#define PCF2127_BIT_SC_OSF BIT(7)
/* Alarm registers */
-#define PCF2127_REG_ALARM_SC 0x0A
-#define PCF2127_REG_ALARM_MN 0x0B
-#define PCF2127_REG_ALARM_HR 0x0C
-#define PCF2127_REG_ALARM_DM 0x0D
-#define PCF2127_REG_ALARM_DW 0x0E
+#define PCF2127_REG_ALARM_BASE 0x0A
+/* Alarm registers offsets (starting from base register) */
+#define PCF2127_OFFSET_ALARM_SC 0
+#define PCF2127_OFFSET_ALARM_MN 1
+#define PCF2127_OFFSET_ALARM_HR 2
+#define PCF2127_OFFSET_ALARM_DM 3
+#define PCF2127_OFFSET_ALARM_DW 4
+/* Alarm bits */
#define PCF2127_BIT_ALARM_AE BIT(7)
/* CLKOUT control register */
#define PCF2127_REG_CLKOUT 0x0f
@@ -110,6 +113,7 @@ struct pcf21xx_config {
unsigned int has_nvmem:1;
unsigned int has_bit_wd_ctl_cd0:1;
u8 regs_td_base; /* Time/data base registers. */
+ u8 regs_alarm_base; /* Alarm function base registers. */
};

struct pcf2127 {
@@ -401,18 +405,18 @@ static int pcf2127_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
if (ret)
return ret;

- ret = regmap_bulk_read(pcf2127->regmap, PCF2127_REG_ALARM_SC, buf,
- sizeof(buf));
+ ret = regmap_bulk_read(pcf2127->regmap, pcf2127->cfg->regs_alarm_base,
+ buf, sizeof(buf));
if (ret)
return ret;

alrm->enabled = ctrl2 & PCF2127_BIT_CTRL2_AIE;
alrm->pending = ctrl2 & PCF2127_BIT_CTRL2_AF;

- alrm->time.tm_sec = bcd2bin(buf[0] & 0x7F);
- alrm->time.tm_min = bcd2bin(buf[1] & 0x7F);
- alrm->time.tm_hour = bcd2bin(buf[2] & 0x3F);
- alrm->time.tm_mday = bcd2bin(buf[3] & 0x3F);
+ alrm->time.tm_sec = bcd2bin(buf[PCF2127_OFFSET_ALARM_SC] & 0x7F);
+ alrm->time.tm_min = bcd2bin(buf[PCF2127_OFFSET_ALARM_MN] & 0x7F);
+ alrm->time.tm_hour = bcd2bin(buf[PCF2127_OFFSET_ALARM_HR] & 0x3F);
+ alrm->time.tm_mday = bcd2bin(buf[PCF2127_OFFSET_ALARM_DM] & 0x3F);

return 0;
}
@@ -446,14 +450,14 @@ static int pcf2127_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
if (ret)
return ret;

- buf[0] = bin2bcd(alrm->time.tm_sec);
- buf[1] = bin2bcd(alrm->time.tm_min);
- buf[2] = bin2bcd(alrm->time.tm_hour);
- buf[3] = bin2bcd(alrm->time.tm_mday);
- buf[4] = PCF2127_BIT_ALARM_AE; /* Do not match on week day */
+ buf[PCF2127_OFFSET_ALARM_SC] = bin2bcd(alrm->time.tm_sec);
+ buf[PCF2127_OFFSET_ALARM_MN] = bin2bcd(alrm->time.tm_min);
+ buf[PCF2127_OFFSET_ALARM_HR] = bin2bcd(alrm->time.tm_hour);
+ buf[PCF2127_OFFSET_ALARM_DM] = bin2bcd(alrm->time.tm_mday);
+ buf[PCF2127_OFFSET_ALARM_DW] = PCF2127_BIT_ALARM_AE; /* Do not match on week day */

- ret = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_ALARM_SC, buf,
- sizeof(buf));
+ ret = regmap_bulk_write(pcf2127->regmap, pcf2127->cfg->regs_alarm_base,
+ buf, sizeof(buf));
if (ret)
return ret;

@@ -658,12 +662,14 @@ static struct pcf21xx_config pcf21xx_cfg[] = {
.has_nvmem = 1,
.has_bit_wd_ctl_cd0 = 1,
.regs_td_base = PCF2127_REG_TIME_DATE_BASE,
+ .regs_alarm_base = PCF2127_REG_ALARM_BASE,
},
[PCF2129] = {
.max_register = 0x19,
.has_nvmem = 0,
.has_bit_wd_ctl_cd0 = 0,
.regs_td_base = PCF2127_REG_TIME_DATE_BASE,
+ .regs_alarm_base = PCF2127_REG_ALARM_BASE,
},
};

--
2.30.2