drivers/gpu/drm/vc4/vc4_crtc.c:671:34: warning: Value stored to 'mode' during its initialization is never read [clang-analyzer-deadcode.DeadStores]
From: kernel test robot
Date: Fri Jan 28 2022 - 01:35:58 EST
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 0280e3c58f92b2fe0e8fbbdf8d386449168de4a8
commit: 16e101051f329f5f3f2dd810f3687d166580aa3a drm/vc4: Increase the core clock based on HVS load
date: 3 months ago
config: arm-randconfig-c002-20220125 (https://download.01.org/0day-ci/archive/20220127/202201272128.DIJ3q9rg-lkp@xxxxxxxxx/config)
compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project 997e128e2a78f5a5434fc75997441ae1ee76f8a4)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install arm cross compiling tool for clang build
# apt-get install binutils-arm-linux-gnueabi
# https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=16e101051f329f5f3f2dd810f3687d166580aa3a
git remote add linus https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
git fetch --no-tags linus master
git checkout 16e101051f329f5f3f2dd810f3687d166580aa3a
# save the config file to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=arm clang-analyzer
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <yujie.liu@xxxxxxxxx>
clang-analyzer warnings: (new ones prefixed by >>)
>> drivers/gpu/drm/vc4/vc4_crtc.c:671:34: warning: Value stored to 'mode' during its initialization is never read [clang-analyzer-deadcode.DeadStores]
const struct drm_display_mode *mode = &crtc_state->adjusted_mode;
^~~~ ~~~~~~~~~~~~~~~~~~~~~~~~~~
vim +/mode +671 drivers/gpu/drm/vc4/vc4_crtc.c
666e73587f90f4 Boris Brezillon 2018-12-06 653
c8b75bca92cbf0 Eric Anholt 2015-03-02 654 static int vc4_crtc_atomic_check(struct drm_crtc *crtc,
29b77ad7b9ca8c Maxime Ripard 2020-10-28 655 struct drm_atomic_state *state)
c8b75bca92cbf0 Eric Anholt 2015-03-02 656 {
29b77ad7b9ca8c Maxime Ripard 2020-10-28 657 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state,
29b77ad7b9ca8c Maxime Ripard 2020-10-28 658 crtc);
29b77ad7b9ca8c Maxime Ripard 2020-10-28 659 struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc_state);
008095e065a85a Boris Brezillon 2018-07-03 660 struct drm_connector *conn;
008095e065a85a Boris Brezillon 2018-07-03 661 struct drm_connector_state *conn_state;
16e101051f329f Maxime Ripard 2021-10-25 662 struct drm_encoder *encoder;
008095e065a85a Boris Brezillon 2018-07-03 663 int ret, i;
c8b75bca92cbf0 Eric Anholt 2015-03-02 664
ee6965c864e3f5 Maxime Ripard 2020-12-15 665 ret = vc4_hvs_atomic_check(crtc, state);
d8dbf44f13b911 Eric Anholt 2015-12-28 666 if (ret)
d8dbf44f13b911 Eric Anholt 2015-12-28 667 return ret;
c8b75bca92cbf0 Eric Anholt 2015-03-02 668
16e101051f329f Maxime Ripard 2021-10-25 669 encoder = vc4_get_crtc_encoder(crtc, crtc_state);
16e101051f329f Maxime Ripard 2021-10-25 670 if (encoder) {
16e101051f329f Maxime Ripard 2021-10-25 @671 const struct drm_display_mode *mode = &crtc_state->adjusted_mode;
16e101051f329f Maxime Ripard 2021-10-25 672 struct vc4_encoder *vc4_encoder = to_vc4_encoder(encoder);
16e101051f329f Maxime Ripard 2021-10-25 673
16e101051f329f Maxime Ripard 2021-10-25 @674 mode = &crtc_state->adjusted_mode;
16e101051f329f Maxime Ripard 2021-10-25 675 if (vc4_encoder->type == VC4_ENCODER_TYPE_HDMI0) {
16e101051f329f Maxime Ripard 2021-10-25 676 vc4_state->hvs_load = max(mode->clock * mode->hdisplay / mode->htotal + 1000,
16e101051f329f Maxime Ripard 2021-10-25 677 mode->clock * 9 / 10) * 1000;
16e101051f329f Maxime Ripard 2021-10-25 678 } else {
16e101051f329f Maxime Ripard 2021-10-25 679 vc4_state->hvs_load = mode->clock * 1000;
16e101051f329f Maxime Ripard 2021-10-25 680 }
16e101051f329f Maxime Ripard 2021-10-25 681 }
16e101051f329f Maxime Ripard 2021-10-25 682
d74252bb8f0e38 Maxime Ripard 2020-11-02 683 for_each_new_connector_in_state(state, conn, conn_state,
29b77ad7b9ca8c Maxime Ripard 2020-10-28 684 i) {
008095e065a85a Boris Brezillon 2018-07-03 685 if (conn_state->crtc != crtc)
008095e065a85a Boris Brezillon 2018-07-03 686 continue;
008095e065a85a Boris Brezillon 2018-07-03 687
666e73587f90f4 Boris Brezillon 2018-12-06 688 vc4_state->margins.left = conn_state->tv.margins.left;
666e73587f90f4 Boris Brezillon 2018-12-06 689 vc4_state->margins.right = conn_state->tv.margins.right;
666e73587f90f4 Boris Brezillon 2018-12-06 690 vc4_state->margins.top = conn_state->tv.margins.top;
666e73587f90f4 Boris Brezillon 2018-12-06 691 vc4_state->margins.bottom = conn_state->tv.margins.bottom;
008095e065a85a Boris Brezillon 2018-07-03 692 break;
008095e065a85a Boris Brezillon 2018-07-03 693 }
008095e065a85a Boris Brezillon 2018-07-03 694
c8b75bca92cbf0 Eric Anholt 2015-03-02 695 return 0;
c8b75bca92cbf0 Eric Anholt 2015-03-02 696 }
c8b75bca92cbf0 Eric Anholt 2015-03-02 697
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0-DAY CI Kernel Test Service, Intel Corporation
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