Re: [PATCH v4 9/9] i2c: piix4: Enable EFCH MMIO for Family 17h+

[Terry Bowman]

Hi Andy,

On 2/8/22 14:10, Andy Shevchenko wrote:
> On Tue, Feb 8, 2022 at 6:33 PM Jean Delvare <jdelvare@xxxxxxx> wrote:
>> On Sun, 30 Jan 2022 12:41:30 -0600, Terry Bowman wrote:
> 
> ...
> 
>>> +#define AMD_PCI_SMBUS_REVISION_MMIO          0x51
>>
>> I don't think that was worth a define. You only use the value once, in
>> a context where the symbolic name doesn't add much value IMHO.
> 
> I don't remember the code context here, but it would be nice in such a
> case to convert this definition to a comment (if it's not crystal
> clear what this magic number is about).
> 
> 

diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c
index 239df17ce02b..218ed8efb83e 100644
--- a/drivers/i2c/busses/i2c-piix4.c
+++ b/drivers/i2c/busses/i2c-piix4.c
@@ -229,6 +229,13 @@ static void piix4_sb800_region_release(struct device *dev,
        release_region(SB800_PIIX4_SMB_IDX, SB800_PIIX4_SMB_MAP_SIZE);
 }
 
+static bool piix4_sb800_use_mmio(struct pci_dev *PIIX4_dev)
+{
+       return (PIIX4_dev->vendor == PCI_VENDOR_ID_AMD &&
+               PIIX4_dev->device == PCI_DEVICE_ID_AMD_KERNCZ_SMBUS &&
+               PIIX4_dev->revision >= AMD_PCI_SMBUS_REVISION_MMIO);
+}
+
 static int piix4_setup(struct pci_dev *PIIX4_dev,
                       const struct pci_device_id *id)
 {

----

I added the context above. I'll add a comment in v5 to describe what and 
why 0x51 is used.

Regards,
Terry