Re: [PATCH net-next] net: dsa: mv88e6xxx: Fix validation of built-in PHYs on 6095/6097

[Tobias Waldekranz]

On Sun, Feb 13, 2022 at 12:58, "Russell King (Oracle)" <linux@xxxxxxxxxxxxxxx> wrote:
> Hi,
>
> Thanks for spotting this. Some comments below.
>
> On Sun, Feb 13, 2022 at 01:37:01AM +0100, Tobias Waldekranz wrote:
>> +static void mv88e6095_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,
>> +				       struct phylink_config *config)
>> +{
>> +	u8 cmode = chip->ports[port].cmode;
>> +
>> +	config->mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100;
>> +
>> +	if (mv88e6xxx_phy_is_internal(chip->ds, port)) {
>> +		if (cmode == MV88E6185_PORT_STS_CMODE_PHY)
>> +			__set_bit(PHY_INTERFACE_MODE_MII,
>> +				  config->supported_interfaces);
>
> Hmm. First, note that with mv88e6xxx_get_caps(), you'll end up with both
> MII and GMII here. GMII is necessary as that's the phylib default if no

I did notice that.

> one specifies anything different in the firmware description. I assume
> you've noticed a problem because you specify MII for the internal ports
> in firmware?

Precisely.

> I'm wondering what the point of checking the cmode here is - if the port
> is internal, won't this switch always have cmode == PHY?

For all intents and purposes: I think so. It is just that the functional
spec. also lists cmode == 4 == disabled (PHYDetect == 0) for the
internal ports. So I figured that there might be some way of strapping
ports as disabled that I had never come across.

Do you think we should drop it?