Re: [PATCH] sh: avoid using IRQ0 on SH3/4

From: Sergey Shtylyov
Date: Fri Feb 25 2022 - 14:29:56 EST


On 2/11/22 11:46 PM, Sergey Shtylyov wrote:

[...]
>>>> Using IRQ0 by the platform devices is going to be disallowed soon (see [1])
>>>> and the code supporting SH3/4 SoCs maps the IRQ #s starting at 0 -- modify
>>>> that code to start the IRQ #s from 16 instead.
>>>>
>>>> [1] https://lore.kernel.org/all/5e001ec1-d3f1-bcb8-7f30-a6301fd9930c@xxxxxx/
>>>>
>>>> Signed-off-by: Sergey Shtylyov <s.shtylyov@xxxxxx>
>>>>
>>>> ---
>>>> The patch is against Linus Torvalds' 'linux.git' repo.
>>>>
>>>> arch/sh/kernel/cpu/sh3/entry.S | 4 ++--
>>>> include/linux/sh_intc.h | 6 +++---
>>>> 2 files changed, 5 insertions(+), 5 deletions(-)
>>>>
>>>> Index: linux/arch/sh/kernel/cpu/sh3/entry.S
>>>> ===================================================================
>>>> --- linux.orig/arch/sh/kernel/cpu/sh3/entry.S
>>>> +++ linux/arch/sh/kernel/cpu/sh3/entry.S
>>>> @@ -470,9 +470,9 @@ ENTRY(handle_interrupt)
>>>> mov r4, r0 ! save vector->jmp table offset for later
>>>>
>>>> shlr2 r4 ! vector to IRQ# conversion
>>>> - add #-0x10, r4
>>>>
>>>> - cmp/pz r4 ! is it a valid IRQ?
>>>> + mov #0x10, r5
>>>> + cmp/ge r5, r4 ! is it a valid IRQ?
>>>
>>> Maybe I should've used cmp/hs... my 1st try at SH assembly! :-)
>
> Yeah, cmp/hs seems m ore correct as we don't subtract any more...
>
>> I can test your revised patch next week on my SH7785LCR.
>
> Please do, although testing on the AP-SH4A* bords would be a bit more
> interesting, as they actually use IRQ0 for the SMSC911x chip...

So, were you finally able to test it?

[...]

MBR, Sergey