Re: [PATCH] PCI: dwc: Fix integrated MSI Receiver mask reg setting during resume

[Lorenzo Pieralisi]

On Sun, 26 Dec 2021 15:40:19 +0800, Jisheng Zhang wrote:
> If the host which makes use of the IP's integrated MSI Receiver losts
> power during suspend, we call dw_pcie_setup_rc() to reinit the RC. But
> dw_pcie_setup_rc() always set the pp->irq_mask[ctrl] as ~0, so the mask
> register is always set as 0xffffffff incorrectly, thus the MSI can't
> work after resume.
> 
> Fix this issue by moving pp->irq_mask[ctrl] initialization to
> dw_pcie_host_init(), so we can correctly set the mask reg during both
> boot and resume.
> 
> [...]

Applied to pci/dwc, thanks!

[1/1] PCI: dwc: Fix integrated MSI Receiver mask reg setting during resume
      https://git.kernel.org/lpieralisi/pci/c/84edd0090e

Thanks,
Lorenzo