Re: [PATCH -V3 2/2 UPDATE] NUMA balancing: avoid to migrate task to CPU-less node

[Huang, Ying]

Hi, Peter,

"Huang, Ying" <ying.huang@xxxxxxxxx> writes:

> In a typical memory tiering system, there's no CPU in slow (PMEM) NUMA
> nodes.  But if the number of the hint page faults on a PMEM node is
> the max for a task, The current NUMA balancing policy may try to place
> the task on the PMEM node instead of DRAM node.  This is unreasonable,
> because there's no CPU in PMEM NUMA nodes.  To fix this, CPU-less
> nodes are ignored when searching the migration target node for a task
> in this patch.
>
> To test the patch, we run a workload that accesses more memory in PMEM
> node than memory in DRAM node.  Without the patch, the PMEM node will
> be chosen as preferred node in task_numa_placement().  While the DRAM
> node will be chosen instead with the patch.
>
> Known issue: I don't have systems to test complex NUMA topology type,
> for example, NUMA_BACKPLANE or NUMA_GLUELESS_MESH.
>
> v3:
>
> - Fix a boot crash for some uncovered marginal condition.  Thanks Qian
>   Cai for reporting and testing the bug!
>
> - Fix several missing places to use CPU-less nodes as migrating
>   target.
>
> Signed-off-by: "Huang, Ying" <ying.huang@xxxxxxxxx>
> Reported-and-tested-by: Qian Cai <quic_qiancai@xxxxxxxxxxx> # boot crash
> Cc: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
> Cc: Valentin Schneider <valentin.schneider@xxxxxxx>
> Cc: Ingo Molnar <mingo@xxxxxxxxxx>
> Cc: Mel Gorman <mgorman@xxxxxxx>
> Cc: Rik van Riel <riel@xxxxxxxxxxx>
> Cc: Srikar Dronamraju <srikar@xxxxxxxxxxxxxxxxxx>

Can you update the patch to fix the bug?  Or you prefer the incremental
patch?

Best Regards,
Huang, Ying