Re: [PATCH v1 2/7] clk: starfive: jh7100: Handle audio_div clock properly

[Stephen Boyd]

Quoting Emil Renner Berthing (2022-01-26 09:39:48)
> It turns out the audio_div clock is a fractional divider where the
> lowest byte of the ctrl register is the integer part of the divider and
> the 2nd byte is the number of 100th added to the divider.
> 
> The children of this clock is used by the audio peripherals for their
> sample rate clock, so round to the closest possible rate rather than
> always rounding down like regular dividers.
> 
> Fixes: 4210be668a09 ("clk: starfive: Add JH7100 clock generator driver")
> Signed-off-by: Emil Renner Berthing <kernel@xxxxxxxx>
> ---

Applied to clk-next