Re: [PATCH v2 3/3] ARM: dts: lpc32xx: Update spi clock properties

From: Vladimir Zapolskiy
Date: Sat Mar 12 2022 - 07:41:05 EST


On 3/12/22 12:23 PM, Krzysztof Kozlowski wrote:
On 11/03/2022 22:26, Vladimir Zapolskiy wrote:
On 3/11/22 4:33 PM, Krzysztof Kozlowski wrote:
On 11/03/2022 15:07, Vladimir Zapolskiy wrote:
On 3/11/22 3:38 PM, Arnd Bergmann wrote:
On Fri, Mar 11, 2022 at 2:20 PM Vladimir Zapolskiy <vz@xxxxxxxxx> wrote:

On 3/11/22 11:38 AM, Kuldeep Singh wrote:
PL022 binding require two clocks to be defined but lpc platform doesn't
comply with bindings and define only one clock i.e apb_pclk.

Update spi clocks and clocks-names property by adding appropriate clock
reference to make it compliant with bindings.

CC: Vladimir Zapolskiy <vz@xxxxxxxxx>
Signed-off-by: Kuldeep Singh <singh.kuldeep87k@xxxxxxxxx>
---
v2:
- New patch with similar changeset
- Send to soc ML

arch/arm/boot/dts/lpc32xx.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi
index c87066d6c995..30958e02d5e2 100644
--- a/arch/arm/boot/dts/lpc32xx.dtsi
+++ b/arch/arm/boot/dts/lpc32xx.dtsi
@@ -178,8 +178,8 @@ ssp0: spi@20084000 {
compatible = "arm,pl022", "arm,primecell";
reg = <0x20084000 0x1000>;
interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&clk LPC32XX_CLK_SSP0>;
- clock-names = "apb_pclk";
+ clocks = <&clk LPC32XX_CLK_SSP0>, <&clk LPC32XX_CLK_SSP0>;
+ clock-names = "sspclk", "apb_pclk";

In fact I'm uncertain if it is the right change, could it happen that the commit
cc0f6e96c4fd ("spi: dt-bindings: Convert Arm pl022 to json-schema") sets a wrong
schema pattern?

Good pointm this doesn't quite seem right: it is unlikely that the same clock
is used for both the SPI bus and the APB bus.

Apparently just one clock is wanted on all observed platforms and cases, this
is implicitly confirmed by clock handling in the drivers/spi/spi-pl022.c :

pl022->clk = devm_clk_get(&adev->dev, NULL);

So, I would vote to fix the device tree bindings schema.

Drivers do not describe the hardware. Bindings should not be modeled on
drivers, but on actual hardware, so the example is not convincing.

My concern is that fixing the bindings can break the driver and all its users,
is it clear enough how it can happen in assumption that the driver uses just
one clock at the moment?

You meant fixing the DTS? We do not consider here "fixing bindings"

Yes, I meant fixing the DTS, sorry for confusion.

because they look correct. About DTS, using the same clock twice should
not cause negative effect.

But it is erroneous to specify the SSP clock as APB clock, so this v2 is
incorrect, and I've mentioned above in the discussion that the APB clock
shall be HCLK on the platform.

To avoid any unpleasant uncertainties I expect to get a change in the
driver firstly, the driver shall work according to the bindings, at
the moment it is obviously broken.

--
Best wishes,
Vladimir