Re: [PATCH] dt-bindings: Fix phandle-array issues in the idle-states bindings

From: Palmer Dabbelt
Date: Fri Apr 01 2022 - 16:08:40 EST


On Fri, 01 Apr 2022 12:50:39 PDT (-0700), Rob Herring wrote:
On Fri, Apr 1, 2022 at 2:32 PM Palmer Dabbelt <palmer@xxxxxxxxxxxx> wrote:

From: Palmer Dabbelt <palmer@xxxxxxxxxxxx>

As per 39bd2b6a3783 ("dt-bindings: Improve phandle-array schemas"), the
phandle-array bindings have been disambiguated. This fixes the new
generic idle-states bindings to comply with the schema.

Fixes: 1bd524f7e8d8 ("dt-bindings: Add common bindings for ARM and RISC-V idle states")
Signed-off-by: Palmer Dabbelt <palmer@xxxxxxxxxxxx>
---
.../devicetree/bindings/cpu/idle-states.yaml | 96 +++++++++----------
1 file changed, 48 insertions(+), 48 deletions(-)

diff --git a/Documentation/devicetree/bindings/cpu/idle-states.yaml b/Documentation/devicetree/bindings/cpu/idle-states.yaml
index 95506ffb816c..6f5223659950 100644
--- a/Documentation/devicetree/bindings/cpu/idle-states.yaml
+++ b/Documentation/devicetree/bindings/cpu/idle-states.yaml
@@ -385,8 +385,8 @@ examples:
compatible = "arm,cortex-a57";
reg = <0x0 0x0>;
enable-method = "psci";
- cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
- &CLUSTER_RETENTION_0 &CLUSTER_SLEEP_0>;
+ cpu-idle-states = <&CPU_RETENTION_0_0>, <&CPU_SLEEP_0_0>,
+ <&CLUSTER_RETENTION_0>, <&CLUSTER_SLEEP_0>;

All the Arm examples are already fixed. You need to fix just the RiscV
examples added in your branch. Otherwise, it is a bunch of merge
conflicts.

Sorry, I'd missed that. I sent a v2 (still trying to figure out what's wrong with the checkers locally).