Re: [PATCH 2/9] dt-bindings: soc: apple: Add ANS NVMe

From: Sven Peter
Date: Sat Apr 02 2022 - 09:05:28 EST


Hi,

thanks for the review!

On Wed, Mar 23, 2022, at 12:14, Krzysztof Kozlowski wrote:
> On 21/03/2022 17:50, Sven Peter wrote:
>> Apple SoCs such as the M1 come with an embedded NVMe coprocessor called
>> ANS2.
>>
>> Signed-off-by: Sven Peter <sven@xxxxxxxxxxxxx>
>> ---
>> .../bindings/soc/apple/apple,nvme-ans.yaml | 75 +++++++++++++++++++
>> 1 file changed, 75 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/soc/apple/apple,nvme-ans.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/soc/apple/apple,nvme-ans.yaml b/Documentation/devicetree/bindings/soc/apple/apple,nvme-ans.yaml
>> new file mode 100644
>> index 000000000000..e1f4c1c572aa
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/soc/apple/apple,nvme-ans.yaml
>> @@ -0,0 +1,75 @@
>> +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/soc/apple/apple,nvme-ans.yaml#
>
> Do not drop all code in soc/apple, but please use respective subsystems.
> Apple is not a subsystem, is not special.
>

Sure, the code is already inside drivers/nvme/host but I'll also create
Documentation/devicetree/bindings/nvme and put the bindings in there as
well.

>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Apple ANS NVM Express host controller
>> +
>> +maintainers:
>> + - Sven Peter <sven@xxxxxxxxxxxxx>
>> +
>> +properties:
>> + compatible:
>> + items:
>> + - enum:
>> + - apple,t8103-nvme-ans2
>> + - apple,t6000-nvme-ans2
>> + - const: apple,nvme-ans2
>> +
>> + reg:
>> + items:
>> + - description: NVMe and NVMMU registers
>> + - description: ANS2 co-processor control registers
>> +
>> + reg-names:
>> + items:
>> + - const: nvme
>> + - const: ans
>> +
>> + resets:
>> + maxItems: 1
>> +
>> + power-domains: true
>
> maxItems

Ok, I guess I can just use the max number of domains in the HW
released so far and we can always increase it when Apple releases
a new SoC that requires more power domains then.


Thanks,

Sven