Re: [RFC PATCH 0/8] media: hantro: Add 10-bit support

[Benjamin Gaignard]

Le 05/04/2022 à 20:40, Jernej Škrabec a écrit :
> Hi Benjamin!
>
> Dne torek, 05. april 2022 ob 18:07:41 CEST je Benjamin Gaignard napisal(a):
> > Le 27/02/2022 à 15:49, Jernej Skrabec a écrit :
> > > First two patches add 10-bit formats to UAPI, third extends filtering
> > > mechanism, fourth fixes incorrect assumption, fifth moves register
> > > configuration code to proper place, sixth and seventh enable 10-bit
> > > VP9 decoding on Allwinner H6 and last increases core frequency on
> > > Allwinner H6.
> > >
> > > I'm sending this as RFC to get some comments:
> > > 1. format definitions - are fourcc's ok? are comments/descriptions ok?
> > > 2. is extended filtering mechanism ok?
> > >
> > > I would also like if these patches are tested on some more HW.
> > > Additionally, can someone test tiled P010?
> > >
> > > Please take a look.
> > Hi Jernej,
> >
> > I have create a branch to test this series with VP9 and HEVC:
> > https://gitlab.collabora.com/benjamin.gaignard/for-upstream/-/tree/10bit_imx
> > 8m Feel free to pick what I may need in it.
> >
> > That doesn't improve fluster scores, I think more dev are still needed in
> > GST before getting something fully functional.
> > Anyway I able to select P010 pixel format if the input is a 10bit bitstream.
> What kind of improvements do you expect? Actually, this series is designed to
> change nothing for platforms, where 10-bit format is not added into the list
> of supported formats. I think reasons are quite obvious. First, not every
> device may support 10-bit output. Second, as you might already figured it out,
> registers in this series are set only for legacy cores. I have no idea, what
> needs to be done for newer ones, since I don't have them. Anyway, I tested
> this with fluster and only one additional test passes, because it is the only
> one for 10-bit YUV420.

In this series you will find that I have added the registers for the new cores,
fix hevc to be able to use 10-bit, and enable that in IMX8M.

Regards,
Benjamin

> Best regards,
> Jernej