[PATCH 03/23] ARM: dts: qcom-msm8974*: Fix UART naming

[Konrad Dybcio]

It's either uart10, or blsp2_uart4, not blsp2_uart10, as there aren't 10
UARTs on BLSP2. Fix the naming to align with what's done in arm64/qcom.

Signed-off-by: Konrad Dybcio <konrad.dybcio@xxxxxxxxxxxxxx>
---
 .../boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts    |  6 +++---
 arch/arm/boot/dts/qcom-msm8974-samsung-klte.dts        | 10 +++++-----
 .../dts/qcom-msm8974-sony-xperia-shinano-castor.dts    |  2 +-
 arch/arm/boot/dts/qcom-msm8974.dtsi                    |  6 +++---
 4 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
index 069136170198..7bd577e8e941 100644
--- a/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
+++ b/arch/arm/boot/dts/qcom-msm8974-lge-nexus5-hammerhead.dts
@@ -12,7 +12,7 @@ / {
 
 	aliases {
 		serial0 = &blsp1_uart1;
-		serial1 = &blsp2_uart10;
+		serial1 = &blsp2_uart4;
 	};
 
 	chosen {
@@ -374,7 +374,7 @@ shutdown {
 			};
 		};
 
-		blsp2_uart10_pin_a: blsp2-uart10-pin-active {
+		blsp2_uart4_pin_a: blsp2-uart4-pin-active {
 			tx {
 				pins = "gpio53";
 				function = "blsp_uart10";
@@ -473,7 +473,7 @@ serial@f9960000 {
 		status = "okay";
 
 		pinctrl-names = "default";
-		pinctrl-0 = <&blsp2_uart10_pin_a>;
+		pinctrl-0 = <&blsp2_uart4_pin_a>;
 
 		bluetooth {
 			compatible = "brcm,bcm43438-bt";
diff --git a/arch/arm/boot/dts/qcom-msm8974-samsung-klte.dts b/arch/arm/boot/dts/qcom-msm8974-samsung-klte.dts
index 96e1c978b878..e4a01a631403 100644
--- a/arch/arm/boot/dts/qcom-msm8974-samsung-klte.dts
+++ b/arch/arm/boot/dts/qcom-msm8974-samsung-klte.dts
@@ -326,13 +326,13 @@ serial@f991e000 {
 		status = "okay";
 	};
 
-	/* blsp2_uart8 */
+	/* blsp2_uart2 */
 	serial@f995e000 {
 		status = "okay";
 
 		pinctrl-names = "default", "sleep";
-		pinctrl-0 = <&blsp2_uart8_pins_active>;
-		pinctrl-1 = <&blsp2_uart8_pins_sleep>;
+		pinctrl-0 = <&blsp2_uart2_pins_active>;
+		pinctrl-1 = <&blsp2_uart2_pins_sleep>;
 
 		bluetooth {
 			compatible = "brcm,bcm43540-bt";
@@ -380,14 +380,14 @@ volume-up {
 	};
 
 	pinctrl@fd510000 {
-		blsp2_uart8_pins_active: blsp2-uart8-pins-active {
+		blsp2_uart2_pins_active: blsp2-uart2-pins-active {
 			pins = "gpio45", "gpio46", "gpio47", "gpio48";
 			function = "blsp_uart8";
 			drive-strength = <8>;
 			bias-disable;
 		};
 
-		blsp2_uart8_pins_sleep: blsp2-uart8-pins-sleep {
+		blsp2_uart2_pins_sleep: blsp2-uart2-pins-sleep {
 			pins = "gpio45", "gpio46", "gpio47", "gpio48";
 			function = "gpio";
 			drive-strength = <2>;
diff --git a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-shinano-castor.dts b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-shinano-castor.dts
index e66937e3f7dd..d0d03ef12c31 100644
--- a/arch/arm/boot/dts/qcom-msm8974-sony-xperia-shinano-castor.dts
+++ b/arch/arm/boot/dts/qcom-msm8974-sony-xperia-shinano-castor.dts
@@ -11,7 +11,7 @@ / {
 
 	aliases {
 		serial0 = &blsp1_uart2;
-		serial1 = &blsp2_uart7;
+		serial1 = &blsp2_uart1;
 	};
 
 	chosen {
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index e216630a1d02..e102b72558f1 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -713,7 +713,7 @@ blsp1_uart2: serial@f991e000 {
 			status = "disabled";
 		};
 
-		blsp2_uart7: serial@f995d000 {
+		blsp2_uart1: serial@f995d000 {
 			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
 			reg = <0xf995d000 0x1000>;
 			interrupts = <GIC_SPI 113 IRQ_TYPE_NONE>;
@@ -722,7 +722,7 @@ blsp2_uart7: serial@f995d000 {
 			status = "disabled";
 		};
 
-		blsp2_uart8: serial@f995e000 {
+		blsp2_uart2: serial@f995e000 {
 			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
 			reg = <0xf995e000 0x1000>;
 			interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
@@ -731,7 +731,7 @@ blsp2_uart8: serial@f995e000 {
 			status = "disabled";
 		};
 
-		blsp2_uart10: serial@f9960000 {
+		blsp2_uart4: serial@f9960000 {
 			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
 			reg = <0xf9960000 0x1000>;
 			interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
-- 
2.35.2