Re: [PATCH V2 1/3] arm64: dts: freescale: Add i.MX93 dtsi support

[Rob Herring]

On Sat, May 07, 2022 at 06:46:16AM +0000, Peng Fan wrote:
> > Subject: Re: [PATCH V2 1/3] arm64: dts: freescale: Add i.MX93 dtsi support
> > 
> > On Tue, May 03, 2022 at 08:29:49PM +0800, Peng Fan (OSS) wrote:
> > ...
> > > diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi
> > > b/arch/arm64/boot/dts/freescale/imx93.dtsi
> > > new file mode 100644
> > > index 000000000000..ae8daffe3492
> > > --- /dev/null
> > > +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
> > > @@ -0,0 +1,337 @@
> > > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> > > +/*
> > > + * Copyright 2022 NXP
> > > + */
> > > +
> > > +#include <dt-bindings/clock/imx93-clock.h> #include
> > > +<dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h>
> > > +#include <dt-bindings/interrupt-controller/arm-gic.h>
> > > +
> > > +#include "imx93-pinfunc.h"
> > > +
> > > +/ {
> > > +	interrupt-parent = <&gic>;
> > > +	#address-cells = <2>;
> > > +	#size-cells = <2>;
> > > +
> > > +	aliases {
> > > +		mmc0 = &usdhc1;
> > > +		mmc1 = &usdhc2;
> > > +		mmc2 = &usdhc3;
> > > +		serial0 = &lpuart1;
> > > +		serial1 = &lpuart2;
> > > +		serial2 = &lpuart3;
> > > +		serial3 = &lpuart4;
> > > +		serial4 = &lpuart5;
> > > +		serial5 = &lpuart6;
> > > +		serial6 = &lpuart7;
> > > +		serial7 = &lpuart8;
> > > +	};
> > > +
> > > +	cpus {
> > > +		#address-cells = <1>;
> > > +		#size-cells = <0>;
> > > +
> > > +		A55_0: cpu@0 {
> > > +			device_type = "cpu";
> > > +			compatible = "arm,cortex-a55";
> > > +			reg = <0x0>;
> > > +			enable-method = "psci";
> > > +			#cooling-cells = <2>;
> > > +		};
> > > +
> > > +		A55_1: cpu@100 {
> > > +			device_type = "cpu";
> > > +			compatible = "arm,cortex-a55";
> > > +			reg = <0x100>;
> > > +			enable-method = "psci";
> > > +			#cooling-cells = <2>;
> > > +		};
> > > +
> > > +	};
> > > +
> > > +	osc_32k: clock-osc-32k {
> > > +		compatible = "fixed-clock";
> > > +		#clock-cells = <0>;
> > > +		clock-frequency = <32768>;
> > > +		clock-output-names = "osc_32k";
> > > +	};
> > > +
> > > +	osc_24m: clock-osc-24m {
> > > +		compatible = "fixed-clock";
> > > +		#clock-cells = <0>;
> > > +		clock-frequency = <24000000>;
> > > +		clock-output-names = "osc_24m";
> > > +	};
> > > +
> > > +	clk_ext1: clock-ext1 {
> > > +		compatible = "fixed-clock";
> > > +		#clock-cells = <0>;
> > > +		clock-frequency = <133000000>;
> > > +		clock-output-names = "clk_ext1";
> > > +	};
> > > +
> > > +	psci {
> > > +		compatible = "arm,psci-1.0";
> > > +		method = "smc";
> > > +	};
> > > +
> > > +	timer {
> > > +		compatible = "arm,armv8-timer";
> > > +		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) |
> > IRQ_TYPE_LEVEL_LOW)>,
> > > +			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) |
> > IRQ_TYPE_LEVEL_LOW)>,
> > > +			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) |
> > IRQ_TYPE_LEVEL_LOW)>,
> > > +			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) |
> > IRQ_TYPE_LEVEL_LOW)>;
> > > +		clock-frequency = <24000000>;
> > > +		arm,no-tick-in-suspend;
> > > +		interrupt-parent = <&gic>;
> > > +	};
> > > +
> > > +	gic: interrupt-controller@48000000 {
> > > +		compatible = "arm,gic-v3";
> > > +		reg = <0 0x48000000 0 0x10000>,
> > > +		      <0 0x48040000 0 0xc0000>;
> > > +		#interrupt-cells = <3>;
> > > +		interrupt-controller;
> > > +		interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
> > > +		interrupt-parent = <&gic>;
> > > +	};
> > > +
> > > +	soc@0 {
> > 
> > Why do we need unit-address '@0' here?
> 
> I follow other i.MX dtsi, imx8m[q/m/n/q] all has it.

Not a great reason, but yes it is needed. A unit-address should be there 
if you have 'reg' or 'ranges' and the latter is true here.

Rob