Re: [PATCH v3 0/4] clk: Baikal-T1 DDR/PCIe resets and some xGMAC fixes

[Manivannan Sadhasivam]

On Thu, May 12, 2022 at 04:27:05PM +0100, Lorenzo Pieralisi wrote:
> On Thu, May 12, 2022 at 03:11:56AM +0300, Serge Semin wrote:
> > On Tue, May 03, 2022 at 11:57:18PM +0300, Serge Semin wrote:
> > > This patchset is an initial one in the series created in the framework
> > > of my Baikal-T1 PCIe/eDMA-related work:
> > > 
> > > [1: In-progress v3] clk: Baikal-T1 DDR/PCIe resets and some xGMAC fixes
> > > Link: https://lore.kernel.org/linux-pci/20220330144320.27039-1-Sergey.Semin@xxxxxxxxxxxxxxxxxxxx/
> > > [2: In-progress v1] PCI: dwc: Various fixes and cleanups
> > > Link: https://lore.kernel.org/linux-pci/20220324012524.16784-1-Sergey.Semin@xxxxxxxxxxxxxxxxxxxx/
> > > [3: In-progress v1] PCI: dwc: Add dma-ranges/YAML-schema/Baikal-T1 support
> > > Link: https://lore.kernel.org/linux-pci/20220324013734.18234-1-Sergey.Semin@xxxxxxxxxxxxxxxxxxxx/
> > > [4: In-progress v1] dmaengine: dw-edma: Add RP/EP local DMA controllers support
> > > Link: https://lore.kernel.org/linux-pci/20220324014836.19149-1-Sergey.Semin@xxxxxxxxxxxxxxxxxxxx/
> > > 
> > > Since some of the patches in the later patchsets depend on the
> > > modifications introduced here, @Lorenzo could you please merge this series
> > > through your PCIe subsystem repo? After getting all the required ack'es of
> > > course.
> > > 
> > > Short summary regarding this patchset. A few more modifications are
> > > introduced here to finally finish the Baikal-T1 CCU unit support up and
> > > prepare the code before adding the Baikal-T1 PCIe/xGMAC support. First of
> > > all it turned out I specified wrong DW xGMAC PTP reference clock divider
> > > in my initial patches. It must be 8, not 10. Secondly I was wrong to add a
> > > joint xGMAC Ref and PTP clock instead of having them separately defined.
> > > The SoC manual describes these clocks as separate fixed clock wrappers.
> > > Finally in order to close the SoC clock/reset support up we need to add
> > > the DDR and PCIe interfaces reset controls support. It's done in two
> > > steps. First I've moved the reset-controls-related code into a dedicated
> > > module. Then the DDR/PCIe reset-control functionality is added.
> > > 
> > > Link: https://lore.kernel.org/linux-pci/20220324010905.15589-1-Sergey.Semin@xxxxxxxxxxxxxxxxxxxx/
> > > Changelog v2:
> > > - Resubmit the series with adding @Philipp to the list of the recipients.
> > > 
> > > Link: https://lore.kernel.org/linux-pci/20220330144320.27039-1-Sergey.Semin@xxxxxxxxxxxxxxxxxxxx/
> > > Changelog v3:
> > > - Rebased from v5.17 onto v5.18-rc3.
> > > - No comments. Just resend the series.
> > 
> > No comments for more than a week. There were no comments in v1 and v2
> > either. Please at least ack or merge in the series. It would be very
> > appreciated to merge it in through one repo with the rest of the
> > patchsets before the next merge window. @Bjorn, @Lorenzo, @Michael?
> 
> Hi Sergey,
> 
> these changes affect the clock tree and have to be reviewed and merged
> by the respective maintainers if they think the changes can be accepted.
> 
> I don't see any reason why we should, if ACK'ed, take them in the PCI
> tree, this series does not apply changes to the PCI tree at all and you
> don't need it as a base for future to-be-merged PCI patches either.
> 
> So in short, this series has to go through the usual clock tree review
> process.
> 

Yes, Stephen should be the one taking these patches through the clk tree. Also,
there is no need to club both pci and clk patches in a single tree. That's
usually done for patches with build dependencies, but here there are none.

Thanks,
Mani

> Thanks,
> Lorenzo
> 
> > -Sergey
> > 
> > > 
> > > Signed-off-by: Serge Semin <Sergey.Semin@xxxxxxxxxxxxxxxxxxxx>
> > > Cc: Alexey Malahov <Alexey.Malahov@xxxxxxxxxxxxxxxxxxxx>
> > > Cc: Pavel Parkhomenko <Pavel.Parkhomenko@xxxxxxxxxxxxxxxxxxxx>
> > > Cc: Rob Herring <robh@xxxxxxxxxx>
> > > Cc: "Krzysztof Wilczyński" <kw@xxxxxxxxx>
> > > Cc: Bjorn Helgaas <bhelgaas@xxxxxxxxxx>
> > > Cc: Thomas Bogendoerfer <tsbogend@xxxxxxxxxxxxxxxx>
> > > Cc: linux-clk@xxxxxxxxxxxxxxx
> > > Cc: linux-pci@xxxxxxxxxxxxxxx
> > > Cc: linux-mips@xxxxxxxxxxxxxxx
> > > Cc: linux-kernel@xxxxxxxxxxxxxxx
> > > 
> > > Serge Semin (4):
> > >   clk: baikal-t1: Fix invalid xGMAC PTP clock divider
> > >   clk: baikal-t1: Define shared xGMAC ref/ptp clocks parent
> > >   clk: baikal-t1: Move reset-controls code into a dedicated module
> > >   clk: baikal-t1: Add DDR/PCIe directly controlled resets support
> > > 
> > >  drivers/clk/baikal-t1/Kconfig       |  12 +-
> > >  drivers/clk/baikal-t1/Makefile      |   1 +
> > >  drivers/clk/baikal-t1/ccu-div.c     |   1 +
> > >  drivers/clk/baikal-t1/ccu-div.h     |   6 +
> > >  drivers/clk/baikal-t1/ccu-rst.c     | 373 ++++++++++++++++++++++++++++
> > >  drivers/clk/baikal-t1/ccu-rst.h     |  64 +++++
> > >  drivers/clk/baikal-t1/clk-ccu-div.c | 102 ++------
> > >  include/dt-bindings/reset/bt1-ccu.h |   9 +
> > >  8 files changed, 482 insertions(+), 86 deletions(-)
> > >  create mode 100644 drivers/clk/baikal-t1/ccu-rst.c
> > >  create mode 100644 drivers/clk/baikal-t1/ccu-rst.h
> > > 
> > > -- 
> > > 2.35.1
> > > 

-- 
மணிவண்ணன் சதாசிவம்