On 5/17/22 10:56, Yang, Weijiang wrote:OK, I'll send a fix patch.
I think it should always transfer them instead? There's time to post aI added more things to ease migration handling in SMM because: 1) qemu
checks LBREn before transfer Arch LBR MSRs.
fixup patch.
Sure, I'll post v12 soon.
0x7f10 sounds good.2) Perf event is created when
LBREn is being set. Two things are not certain: 1) IA32_LBR_CTL doesn't have
corresponding slot in SMRAM,not sure if we need to rely on it to transfer the MSR.
I chose 0x7f10 as the offset(CET takes 0x7f08) for storage, need you double check if
it's free or used.
Hi, Paolo,Yes, please.
I found there're some rebase conflicts between this series and your kvm
queue branch due to PEBS patches, I can re-post a new version based on
your queue branch if necessary.
Clear :-D, thanks!
Waiting for your comments on this patch...I already commented that using bit 63 is not good, didn't I?
Paolo