Re: [PATCH] riscv: Fix irq_work when SMP is disabled

From: Palmer Dabbelt
Date: Thu Jun 02 2022 - 00:27:33 EST


On Tue, 03 May 2022 16:16:26 PDT (-0700), heiko@xxxxxxxxx wrote:
Am Samstag, 30. April 2022, 05:00:23 CEST schrieb Samuel Holland:
irq_work is triggered via an IPI, but the IPI infrastructure is not
included in uniprocessor kernels. As a result, irq_work never runs.
Fall back to the tick-based irq_work implementation on uniprocessor
configurations.

Fixes: 298447928bb1 ("riscv: Support irq_work via self IPIs")
Signed-off-by: Samuel Holland <samuel@xxxxxxxxxxxx>

That uniprocessor part seems a tiny bit neglected - as I saw previously
with alternatives not getting applied as well, so

Ya, it definately is -- and not just me missing this fix, I'd also dropped the CONFIG_SMP=n test from my list by accident. Luckily it still boots in QEMU, so at least it's not as brokn as it could be.


Reviewed-by: Heiko Stuebner <heiko@xxxxxxxxx>

Though somehow I find the arm32 style a tad nicer by defining
an is_smp() function [0] that holds the necessary checks.

But I guess that is a style preference.

IIUC that's slightly different: this is a compile-time issue related to the IPI framework not coming up at all, not a runtime "are we on a uniprocessor" issue.

I put this on for-next (no fixes right now, I'm still collecting 5.19 merge window material).

Thanks!



Heiko


[0] https://elixir.bootlin.com/linux/latest/source/arch/arm/include/asm/smp_plat.h#L18
---
This was found while bringing up cpufreq on D1. Switching cpufreq
governors was hanging on irq_work_sync().

arch/riscv/include/asm/irq_work.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/riscv/include/asm/irq_work.h b/arch/riscv/include/asm/irq_work.h
index d6c277992f76..b53891964ae0 100644
--- a/arch/riscv/include/asm/irq_work.h
+++ b/arch/riscv/include/asm/irq_work.h
@@ -4,7 +4,7 @@

static inline bool arch_irq_work_has_interrupt(void)
{
- return true;
+ return IS_ENABLED(CONFIG_SMP);
}
extern void arch_irq_work_raise(void);
#endif /* _ASM_RISCV_IRQ_WORK_H */