[peterz-queue:sched/idle 35/37] arch/arm/mach-omap2/pm34xx.c:259:17: error: implicit declaration of function 'cpuidle_rcu_enter'
From: kernel test robot
Date: Sun Jun 05 2022 - 22:42:27 EST
tree: https://git.kernel.org/pub/scm/linux/kernel/git/peterz/queue.git sched/idle
head: e11e56428f57b36930eb0f8eed997a462010aa95
commit: 62afaa7d0110b1859122c56074cdd8ed5758836b [35/37] cpuidle,omap3: Push RCU-idle into omap_sram_idle()
config: arm-allmodconfig (https://download.01.org/0day-ci/archive/20220606/202206061030.nJjn2zh6-lkp@xxxxxxxxx/config)
compiler: arm-linux-gnueabi-gcc (GCC) 11.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://git.kernel.org/pub/scm/linux/kernel/git/peterz/queue.git/commit/?id=62afaa7d0110b1859122c56074cdd8ed5758836b
git remote add peterz-queue https://git.kernel.org/pub/scm/linux/kernel/git/peterz/queue.git
git fetch --no-tags peterz-queue sched/idle
git checkout 62afaa7d0110b1859122c56074cdd8ed5758836b
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.3.0 make.cross W=1 O=build_dir ARCH=arm SHELL=/bin/bash
If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp@xxxxxxxxx>
All errors (new ones prefixed by >>):
arch/arm/mach-omap2/pm34xx.c: In function 'omap_sram_idle':
>> arch/arm/mach-omap2/pm34xx.c:259:17: error: implicit declaration of function 'cpuidle_rcu_enter' [-Werror=implicit-function-declaration]
259 | cpuidle_rcu_enter();
| ^~~~~~~~~~~~~~~~~
>> arch/arm/mach-omap2/pm34xx.c:267:17: error: implicit declaration of function 'rcuidle_rcu_exit'; did you mean 'rcu_idle_exit'? [-Werror=implicit-function-declaration]
267 | rcuidle_rcu_exit();
| ^~~~~~~~~~~~~~~~
| rcu_idle_exit
cc1: some warnings being treated as errors
vim +/cpuidle_rcu_enter +259 arch/arm/mach-omap2/pm34xx.c
176
177 void omap_sram_idle(bool rcuidle)
178 {
179 /* Variable to tell what needs to be saved and restored
180 * in omap_sram_idle*/
181 /* save_state = 0 => Nothing to save and restored */
182 /* save_state = 1 => Only L1 and logic lost */
183 /* save_state = 2 => Only L2 lost */
184 /* save_state = 3 => L1, L2 and logic lost */
185 int save_state = 0;
186 int mpu_next_state = PWRDM_POWER_ON;
187 int per_next_state = PWRDM_POWER_ON;
188 int core_next_state = PWRDM_POWER_ON;
189 u32 sdrc_pwr = 0;
190 int error;
191
192 mpu_next_state = pwrdm_read_next_pwrst(mpu_pwrdm);
193 switch (mpu_next_state) {
194 case PWRDM_POWER_ON:
195 case PWRDM_POWER_RET:
196 /* No need to save context */
197 save_state = 0;
198 break;
199 case PWRDM_POWER_OFF:
200 save_state = 3;
201 break;
202 default:
203 /* Invalid state */
204 pr_err("Invalid mpu state in sram_idle\n");
205 return;
206 }
207
208 /* NEON control */
209 if (pwrdm_read_pwrst(neon_pwrdm) == PWRDM_POWER_ON)
210 pwrdm_set_next_pwrst(neon_pwrdm, mpu_next_state);
211
212 /* Enable IO-PAD and IO-CHAIN wakeups */
213 per_next_state = pwrdm_read_next_pwrst(per_pwrdm);
214 core_next_state = pwrdm_read_next_pwrst(core_pwrdm);
215
216 pwrdm_pre_transition(NULL);
217
218 /* PER */
219 if (per_next_state == PWRDM_POWER_OFF) {
220 error = cpu_cluster_pm_enter();
221 if (error)
222 return;
223 }
224
225 /* CORE */
226 if (core_next_state < PWRDM_POWER_ON) {
227 if (core_next_state == PWRDM_POWER_OFF) {
228 omap3_core_save_context();
229 omap3_cm_save_context();
230 }
231 }
232
233 /* Configure PMIC signaling for I2C4 or sys_off_mode */
234 omap3_vc_set_pmic_signaling(core_next_state);
235
236 omap3_intc_prepare_idle();
237
238 /*
239 * On EMU/HS devices ROM code restores a SRDC value
240 * from scratchpad which has automatic self refresh on timeout
241 * of AUTO_CNT = 1 enabled. This takes care of erratum ID i443.
242 * Hence store/restore the SDRC_POWER register here.
243 */
244 if (cpu_is_omap3430() && omap_rev() >= OMAP3430_REV_ES3_0 &&
245 (omap_type() == OMAP2_DEVICE_TYPE_EMU ||
246 omap_type() == OMAP2_DEVICE_TYPE_SEC) &&
247 core_next_state == PWRDM_POWER_OFF)
248 sdrc_pwr = sdrc_read_reg(SDRC_POWER);
249
250 /*
251 * omap3_arm_context is the location where some ARM context
252 * get saved. The rest is placed on the stack, and restored
253 * from there before resuming.
254 */
255 if (save_state)
256 omap34xx_save_context(omap3_arm_context);
257
258 if (rcuidle)
> 259 cpuidle_rcu_enter();
260
261 if (save_state == 1 || save_state == 3)
262 cpu_suspend(save_state, omap34xx_do_sram_idle);
263 else
264 omap34xx_do_sram_idle(save_state);
265
266 if (rcuidle)
> 267 rcuidle_rcu_exit();
268
269 /* Restore normal SDRC POWER settings */
270 if (cpu_is_omap3430() && omap_rev() >= OMAP3430_REV_ES3_0 &&
271 (omap_type() == OMAP2_DEVICE_TYPE_EMU ||
272 omap_type() == OMAP2_DEVICE_TYPE_SEC) &&
273 core_next_state == PWRDM_POWER_OFF)
274 sdrc_write_reg(sdrc_pwr, SDRC_POWER);
275
276 /* CORE */
277 if (core_next_state < PWRDM_POWER_ON &&
278 pwrdm_read_prev_pwrst(core_pwrdm) == PWRDM_POWER_OFF) {
279 omap3_core_restore_context();
280 omap3_cm_restore_context();
281 omap3_sram_restore_context();
282 omap2_sms_restore_context();
283 } else {
284 /*
285 * In off-mode resume path above, omap3_core_restore_context
286 * also handles the INTC autoidle restore done here so limit
287 * this to non-off mode resume paths so we don't do it twice.
288 */
289 omap3_intc_resume_idle();
290 }
291
292 pwrdm_post_transition(NULL);
293
294 /* PER */
295 if (per_next_state == PWRDM_POWER_OFF)
296 cpu_cluster_pm_exit();
297 }
298
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