RE: [PATCH v4 1/2] dt-bindings: PCI: xilinx-cpm: Add Versal CPM5 Root Port

[Bharat Kumar Gogada]

> On Wed, Jun 08, 2022 at 10:10:45PM +0530, Bharat Kumar Gogada wrote:
> > Xilinx Versal Premium series has CPM5 block which supports Root Port
> > functionality at Gen5 speed.
> >
> > Add support for YAML schemas documentation for Versal CPM5 Root Port
> driver.
> >
> > Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@xxxxxxxxxx>
> > ---
> >  .../bindings/pci/xilinx-versal-cpm.yaml       | 48 +++++++++++++++++--
> >  1 file changed, 44 insertions(+), 4 deletions(-)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml
> > b/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml
> > index cca395317a4c..80597f2974e5 100644
> > --- a/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml
> > +++ b/Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml
> > @@ -14,17 +14,27 @@ allOf:
> >
> >  properties:
> >    compatible:
> > -    const: xlnx,versal-cpm-host-1.00
> > +    contains:
> 
> Drop 'contains'.
> 
> > +      enum:
> > +        - xlnx,versal-cpm-host-1.00
> > +        - xlnx,versal-cpm5-host
> >
> >    reg:
> >      items:
> >        - description: CPM system level control and status registers.
> >        - description: Configuration space region and bridge registers.
> > +      - description: CPM5 control and status registers.
> > +    minItems: 2
> >
> >    reg-names:
> > -    items:
> > -      - const: cpm_slcr
> > -      - const: cfg
> > +    oneOf:
> 
> You don't need oneOf.
> 
> > +      - items:
> > +          - const: cpm_slcr
> > +          - const: cfg
> 
> > +      - items:
> > +          - const: cpm_slcr
> > +          - const: cfg
> > +          - const: cpm_csr
> 
> Just add 'minItems: 2'
> 
Thanks Rob, will change this in next patch.

Regards,
Bharat