Re: [PATCH 3/4] soc: mediatek: add support of MTK_SCPD_STRICT_BUSP cap

From: Matthias Brugger
Date: Fri Jun 17 2022 - 10:20:18 EST




On 30/05/2022 22:42, Fabien Parent wrote:
From: Alexandre Bailon <abailon@xxxxxxxxxxxx>

This adds support of MTK_SCPD_STRICT_BUSP cap.
This is required by the mt8365, for the MM power domain.


Please explain better waht this flag is doing.

Signed-off-by: Alexandre Bailon <abailon@xxxxxxxxxxxx>
Signed-off-by: Fabien Parent <fparent@xxxxxxxxxxxx>
---
drivers/soc/mediatek/mtk-pm-domains.c | 37 ++++++++++++++++++++-------
drivers/soc/mediatek/mtk-pm-domains.h | 1 +
2 files changed, 29 insertions(+), 9 deletions(-)

diff --git a/drivers/soc/mediatek/mtk-pm-domains.c b/drivers/soc/mediatek/mtk-pm-domains.c
index 90b91b3b19a8..beaa5785fda2 100644
--- a/drivers/soc/mediatek/mtk-pm-domains.c
+++ b/drivers/soc/mediatek/mtk-pm-domains.c
@@ -263,17 +263,36 @@ static int scpsys_power_on(struct generic_pm_domain *genpd)
regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_ISO_BIT);
regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_RST_B_BIT);
- ret = clk_bulk_prepare_enable(pd->num_subsys_clks, pd->subsys_clks);
- if (ret)
- goto err_pwr_ack;

I think it would help readability if we would enable the clocks only in the case that MTK_SCPD_CAPS(pd, MTK_SCPD_STRICT_BUSP) is false. Then we would only need to add the same if to the error path of err_disable_subsys_clks, correct?

Regards,
Matthias

+ if (MTK_SCPD_CAPS(pd, MTK_SCPD_STRICT_BUSP)) {
+ /*
+ * In few Mediatek platforms(e.g. MT6779), the bus protect
+ * policy is stricter, which leads to bus protect release must
+ * be prior to bus access.
+ */
+ ret = scpsys_sram_enable(pd);
+ if (ret < 0)
+ goto err_pwr_ack;
- ret = scpsys_sram_enable(pd);
- if (ret < 0)
- goto err_disable_subsys_clks;
+ ret = scpsys_bus_protect_disable(pd);
+ if (ret < 0)
+ goto err_pwr_ack;
- ret = scpsys_bus_protect_disable(pd);
- if (ret < 0)
- goto err_disable_sram;
+ ret = clk_bulk_prepare_enable(pd->num_subsys_clks, pd->subsys_clks);
+ if (ret < 0)
+ goto err_pwr_ack;
+ } else {
+ ret = clk_bulk_prepare_enable(pd->num_subsys_clks, pd->subsys_clks);
+ if (ret)
+ goto err_pwr_ack;
+
+ ret = scpsys_sram_enable(pd);
+ if (ret < 0)
+ goto err_disable_subsys_clks;
+
+ ret = scpsys_bus_protect_disable(pd);
+ if (ret < 0)
+ goto err_disable_sram;
+ }
return 0;
diff --git a/drivers/soc/mediatek/mtk-pm-domains.h b/drivers/soc/mediatek/mtk-pm-domains.h
index a3955d960233..5347471bc3c4 100644
--- a/drivers/soc/mediatek/mtk-pm-domains.h
+++ b/drivers/soc/mediatek/mtk-pm-domains.h
@@ -8,6 +8,7 @@
#define MTK_SCPD_SRAM_ISO BIT(2)
#define MTK_SCPD_KEEP_DEFAULT_OFF BIT(3)
#define MTK_SCPD_DOMAIN_SUPPLY BIT(4)
+#define MTK_SCPD_STRICT_BUSP BIT(5)
#define MTK_SCPD_CAPS(_scpd, _x) ((_scpd)->data->caps & (_x))
#define SPM_VDE_PWR_CON 0x0210