Re: [RFC 3/6] clk: microchip: mpfs: add reset controller

[Christophe JAILLET]

Le 19/06/2022 à 18:49, Conor Dooley a écrit :
> From: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
>
> Add a reset controller to PolarFire SoC's clock driver. This reset
> controller is registered as an aux device and read/write functions
> exported to the drivers namespace so that the reset controller can
> access the peripheral device reset register.
>
> Signed-off-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>

[...]

> +static void mpfs_reset_adev_release(struct device *dev)
> +{
> +	struct auxiliary_device *adev = to_auxiliary_dev(dev);
> +
> +	auxiliary_device_uninit(adev);
> +
> +	kfree(adev->name);

?

Below we have:
	adev->name = "reset-mpfs";


> +	kfree(adev);
> +}
> +
> +static struct auxiliary_device *mpfs_reset_adev_alloc(struct mpfs_clock_data *clk_data)
> +{
> +	struct auxiliary_device *adev;
> +	int ret;
> +
> +	adev = kzalloc(sizeof(*adev), GFP_KERNEL);
> +	if (!adev)
> +		return ERR_PTR(-ENOMEM);
> +
> +	adev->name = "reset-mpfs";
> +	adev->dev.parent = clk_data->dev;
> +	adev->dev.release = mpfs_reset_adev_release;
> +	adev->id = 666u;
> +
> +	ret = auxiliary_device_init(adev);
> +	if (ret) {
> +		kfree(adev);
> +		return ERR_PTR(ret);
> +	}
> +
> +	return adev;
> +}

[...]