[PATCH v3 3/3] mfd: intel-m10-bmc: support different BMC base register address
From: Tianfei Zhang
Date: Fri Jun 24 2022 - 05:26:30 EST
There are different base addresses for the MAX10 CSR registers.
Introducing a new member "base" in intel_m10bmc data structure
to support different BMC base register addresses.
Signed-off-by: Tianfei Zhang <tianfei.zhang@xxxxxxxxx>
---
v3:
- use a new member "base" instead of m10bmc_csr data structure.
---
drivers/mfd/intel-m10-bmc-pmci.c | 1 +
drivers/mfd/intel-m10-bmc.c | 1 +
include/linux/mfd/intel-m10-bmc.h | 4 +++-
3 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/mfd/intel-m10-bmc-pmci.c b/drivers/mfd/intel-m10-bmc-pmci.c
index 93eca4483ac7..26eeda9720dc 100644
--- a/drivers/mfd/intel-m10-bmc-pmci.c
+++ b/drivers/mfd/intel-m10-bmc-pmci.c
@@ -221,6 +221,7 @@ static int pmci_probe(struct dfl_device *ddev)
return -ENOMEM;
pmci->m10bmc.dev = dev;
+ pmci->m10bmc.base = M10BMC_PMCI_SYS_BASE;
pmci->dev = dev;
pmci->base = devm_ioremap_resource(dev, &ddev->mmio_res);
diff --git a/drivers/mfd/intel-m10-bmc.c b/drivers/mfd/intel-m10-bmc.c
index 7e521df29c72..f4cb67629404 100644
--- a/drivers/mfd/intel-m10-bmc.c
+++ b/drivers/mfd/intel-m10-bmc.c
@@ -171,6 +171,7 @@ static int intel_m10_bmc_spi_probe(struct spi_device *spi)
return -ENOMEM;
ddata->dev = dev;
+ ddata->base = M10BMC_SYS_BASE;
ddata->regmap =
devm_regmap_init_spi_avmm(spi, &intel_m10bmc_regmap_config);
diff --git a/include/linux/mfd/intel-m10-bmc.h b/include/linux/mfd/intel-m10-bmc.h
index 7b58af207b72..0c81dbcdc3dc 100644
--- a/include/linux/mfd/intel-m10-bmc.h
+++ b/include/linux/mfd/intel-m10-bmc.h
@@ -130,10 +130,12 @@
* struct intel_m10bmc - Intel MAX 10 BMC parent driver data structure
* @dev: this device
* @regmap: the regmap used to access registers by m10bmc itself
+ * @base: the base address of MAX10 BMC registers
*/
struct intel_m10bmc {
struct device *dev;
struct regmap *regmap;
+ unsigned int base;
};
/*
@@ -165,6 +167,6 @@ m10bmc_raw_read(struct intel_m10bmc *m10bmc, unsigned int addr,
* M10BMC_SYS_BASE accordingly.
*/
#define m10bmc_sys_read(m10bmc, offset, val) \
- m10bmc_raw_read(m10bmc, M10BMC_SYS_BASE + (offset), val)
+ m10bmc_raw_read(m10bmc, (m10bmc)->base + (offset), val)
#endif /* __MFD_INTEL_M10_BMC_H */
--
2.26.2