Re: DMA-buf and uncached system memory

[Nicolas Dufresne]

Le jeudi 23 juin 2022 à 11:33 +0200, Lucas Stach a écrit :
> > 
> > See for example on AMD/Intel hardware most of the engines can perfectly 
> > deal with cache coherent memory accesses. Only the display engines can't.
> > 
> > So on import time we can't even say if the access can be coherent and 
> > snoop the CPU cache or not because we don't know how the imported 
> > DMA-buf will be used later on.
> > 
> So for those mixed use cases, wouldn't it help to have something
> similar to the dma_sync in the DMA-buf API, so your scanout usage can
> tell the exporter that it's going to do non-snoop access and any dirty
> cache lines must be cleaned? Signaling this to the exporter would allow
> to skip the cache maintenance if the buffer is in CPU uncached memory,
> which again is a default case for the ARM SoC world.

Telling the exporter for every scan is unneeded overhead. If that information is
made available "properly", then tracking it in attach/detach is sufficient and
lightweight.

Nicolas