[PATCH v2] x86/fault: ignore RSVD flag in error code if P flag is 0
From: Vasily Averin
Date: Thu Jun 30 2022 - 19:58:13 EST
Several older Intel CPUs have this or a similar erratum.
For instance, the "Intel Xeon Processor 5400 Series
Specification Update" [1] has
"AX74. Not-Present Page Faults May Set the RSVD Flag in the Error Code
Problem:
An attempt to access a page that is not marked present causes
a page fault. Such a page fault delivers an error code in which
both the P flag (bit 0) and the RSVD flag (bit 3) are 0.
Due to this erratum, not-present page faults may deliver
an error code in which the P flag is 0 but the RSVD flag is 1.
Implication:
Software may erroneously infer that a page fault was due to
a reserved-bit violation when it was actually due to an attempt
to access a not-present page. Intel has not observed this erratum
with any commercially available software.
Workaround:
Page-fault handlers should ignore the RSVD flag in the error
code if the P flag is 0"
This problem has been observed several times on several nodes using
Intel Xeon E5450 processors. These nodes were crashed after
"Bad pagetable: 000c" messages like this:
Corrupted page table at address 7f62d5b48e68
PGD 80000002e92bf067 PUD 1c99c5067 PMD 195015067 PTE 7fffffffb78b680
Bad pagetable: 000c [#1] SMP
Error code here is 0xc, it have set RSVD flag (bit 3), however P flag
(bit 0) is clear.
Let's follow the recommendations and ignore the RSVD flag in the cases
described.
Link: [1] https://www.intel.com/content/dam/www/public/us/en/documents/specification-updates/xeon-5400-spec-update.pdf
Link: https://lore.kernel.org/all/aae9c7c6-989c-0261-470a-252537493b53@xxxxxxxxxx
Reported-by: Steve Sipes <steve.sipes@xxxxxxxxxxxxxxxxxxx>
Signed-off-by: Vasily Averin <vvs@xxxxxxxxxx>
---
v2: added original reporter
improved patch description, added link to CPU spec update
---
arch/x86/mm/fault.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c
index fe10c6d76bac..ffc6d6bd2a22 100644
--- a/arch/x86/mm/fault.c
+++ b/arch/x86/mm/fault.c
@@ -1481,6 +1481,15 @@ handle_page_fault(struct pt_regs *regs, unsigned long error_code,
if (unlikely(kmmio_fault(regs, address)))
return;
+ /*
+ * Some older Intel CPUs have errata
+ * "Not-Present Page Faults May Set the RSVD Flag in the Error Code"
+ * It is recommended to ignore the RSVD flag (bit 3) in the error code
+ * if the P flag (bit 0) is 0.
+ */
+ if (unlikely((error_code & X86_PF_RSVD) && !(error_code & X86_PF_PROT)))
+ error_code &= ~X86_PF_RSVD;
+
/* Was the fault on kernel-controlled part of the address space? */
if (unlikely(fault_in_kernel_space(address))) {
do_kern_addr_fault(regs, error_code, address);
--
2.36.1