Re: [PATCH 07/11] dt-bindings: spi: spi-nxp-fspi: add a new property nxp,fspi-dll-slvdly

[Michael Walle]

Am 2022-07-05 16:52, schrieb Han Xu:
> On 22/07/05 04:12PM, Krzysztof Kozlowski wrote:
> > On 05/07/2022 16:06, Michael Walle wrote:
> > >
> > >>>
> > >>> I think you could use here clock cycles or clock phase, but then it
> > >>> has to be obvious
> > >>> it is that unit.
> > >>
> > >> Hi Krzysztof,
> > >>
> > >> Let me clarify it, in the document a term "delay cell" was used to
> > >> descript this register bit. Each delay cell equals "1/32 clock phase",
> > >> so the unit of delay cell is clock phase. The value user need set in
> > >> DT just number to define how many delay cells needed.
> > >
> > > Then should the unit be "-degrees" and the possible range 0-180?
> >
> > Thanks. We don't have it documented currently, but the unit seems
> > reasonable.
>
> IMO, use the unit "-degrees" makes it more complicate. Personaly I 
> would
> calculate how many clock cycle delay needed, such as 1/4 clock cycle or 
> half
> clock cycle. Using degree brings extra calculation.

What is the extra calculation here? For hardware engineer who has to
specify this, it is easier to give the delay in clock phase (in degrees)
rather than reading the documentation and transform that into a value
given in 1/32 part of a clock, that should be part of the driver.

> The granularity of the clock phase change is 1/32 of 180 degree, but 
> the range
> 0-180 make people feel it can be set in any degree in range.

I'm not sure if the DT bindings have a granularity feature but you
could just round to the next possible value. I guess that is
the case for any value which isn't given as the raw value.

-michael

> If I describe all details of the relation between "nxp,fspi-dll-slvdly" 
> and
> "delay cell" in patch v2, do you think it's clear for users?