RE: [RFC 1/2] PCI: imx6: Make sure the DBI register can be changed

From: Hongxing Zhu
Date: Mon Jul 11 2022 - 21:30:12 EST


> -----Original Message-----
> From: Bjorn Helgaas <helgaas@xxxxxxxxxx>
> Sent: 2022年7月12日 6:17
> To: Hongxing Zhu <hongxing.zhu@xxxxxxx>
> Cc: l.stach@xxxxxxxxxxxxxx; bhelgaas@xxxxxxxxxx;
> lorenzo.pieralisi@xxxxxxx; festevam@xxxxxxxxx; linux-pci@xxxxxxxxxxxxxxx;
> linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx;
> kernel@xxxxxxxxxxxxxx; dl-linux-imx <linux-imx@xxxxxxx>
> Subject: Re: [RFC 1/2] PCI: imx6: Make sure the DBI register can be changed
>
> Hi Richard,
>
> On Wed, May 18, 2022 at 05:35:27PM +0800, Richard Zhu wrote:
> > The PCIE_DBI_RO_WR_EN bit should be set when write some DBI registers.
> > To make sure that the DBI registers are writable, set the
> > PCIE_DBI_RO_WR_EN properly when touch the DBI registers.
> >
> > Signed-off-by: Richard Zhu <hongxing.zhu@xxxxxxx>
> > ---
> > drivers/pci/controller/dwc/pci-imx6.c | 4 ++++
> > 1 file changed, 4 insertions(+)
> >
> > diff --git a/drivers/pci/controller/dwc/pci-imx6.c
> > b/drivers/pci/controller/dwc/pci-imx6.c
> > index 6619e3caffe2..30641d2dda14 100644
> > --- a/drivers/pci/controller/dwc/pci-imx6.c
> > +++ b/drivers/pci/controller/dwc/pci-imx6.c
> > @@ -797,10 +797,12 @@ static int imx6_pcie_start_link(struct dw_pcie
> *pci)
> > * started in Gen2 mode, there is a possibility the devices on the
> > * bus will not be detected at all. This happens with PCIe switches.
> > */
> > + dw_pcie_dbi_ro_wr_en(pci);
>
> What's the status of this patch? I don't see this change included in your v14
> series [1]. That series has a lot of imx6 updates, so I would have thought
> you'd include this change in it. Or maybe this change turned out not to be
> needed?
Hi Bjorn:
Thanks for your kindly help.
The v14 series[1] had been reviewing for a quite time. I'm afraid that
this series might miss the L5.20 merge window if I add new patch
into it from time to time.
If you don't think so, I can merge the first one, and re-issue the v15 a
moment later.
>
> What about the 2/2 patch?
i.MX8MP PCIe supports the PCIe GEN3 speed, the second patch is used to extend
the link speed support capability, and prepared for i.MX8MP PCIe support.
I assumed that these two patches can be contained in i.MX8MP PCIe support
patch-set before.

>
> They're both marked "RFC" which is sometimes a hint that the author isn't
> really committed to the patch, so sometimes they don't get the attention they
> deserve.
>
I see. Would remove the "RFC" when issue the patch next time.
Thanks.

Best Regards
Richard Zhu

> Bjorn
>
> [1]
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> > tmp = dw_pcie_readl_dbi(pci, offset + PCI_EXP_LNKCAP);
> > tmp &= ~PCI_EXP_LNKCAP_SLS;
> > tmp |= PCI_EXP_LNKCAP_SLS_2_5GB;
> > dw_pcie_writel_dbi(pci, offset + PCI_EXP_LNKCAP, tmp);
> > + dw_pcie_dbi_ro_wr_dis(pci);
> >
> > /* Start LTSSM. */
> > imx6_pcie_ltssm_enable(dev);
> > @@ -809,6 +811,7 @@ static int imx6_pcie_start_link(struct dw_pcie
> > *pci)
> >
> > if (pci->link_gen == 2) {
> > /* Allow Gen2 mode after the link is up. */
> > + dw_pcie_dbi_ro_wr_en(pci);
> > tmp = dw_pcie_readl_dbi(pci, offset + PCI_EXP_LNKCAP);
> > tmp &= ~PCI_EXP_LNKCAP_SLS;
> > tmp |= PCI_EXP_LNKCAP_SLS_5_0GB;
> > @@ -821,6 +824,7 @@ static int imx6_pcie_start_link(struct dw_pcie *pci)
> > tmp = dw_pcie_readl_dbi(pci, PCIE_LINK_WIDTH_SPEED_CONTROL);
> > tmp |= PORT_LOGIC_SPEED_CHANGE;
> > dw_pcie_writel_dbi(pci, PCIE_LINK_WIDTH_SPEED_CONTROL, tmp);
> > + dw_pcie_dbi_ro_wr_dis(pci);
> >
> > if (imx6_pcie->drvdata->flags &
> > IMX6_PCIE_FLAG_IMX6_SPEED_CHANGE) {
> > --
> > 2.25.1
> >
> >
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