On 07/20/2022 04:32 PM, Tiezhu Yang wrote:
According to the configuration information accessible by the CPUCFG
instruction [1] and the Overview of Control and Status Registers [2],
we can not see the descriptions about LOONGARCH_CPUCFG48 (0x30),
LOONGARCH_CSR_PRID (0xc0), LOONGARCH_CSR_MCSR* (0xc0 ~ 0xff) and
LOONGARCH_CSR_UCAWIN* (0x100 ~ 0x109), they are not used in the
current kernel code.
LOONGARCH_CPUCFG48 may be used only in the firmware layer, it should
not be used in the future for kernel developers, remove the related
LOONGARCH_CPUCFG48 definitions.
LOONGARCH_CSR_MCSR* is shadow of LOONGARCH_CPUCFG*, no need to access
LOONGARCH_CSR_MCSR* and LOONGARCH_CSR_PRID through CSR instruction,
use CPUCFG instruction to access LOONGARCH_CPUCFG* is enough, so also
remove LOONGARCH_CSR_MCSR* and LOONGARCH_CSR_PRID definitions.
LOONGARCH_CSR_UCAWIN* may be not implemented in hardware, use CSR
instruction to access them is meaningless, so also remove the related
LOONGARCH_CSR_UCAWIN* definitions.
The intention of this patch is to keep consistent between the code and
the manual.
[1] https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html#the-configuration-information-accessible-by-the-cpucfg-instruction
[2] https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html#table-overview-of-control-and-status-registers
Signed-off-by: Tiezhu Yang <yangtiezhu@xxxxxxxxxxx>
---
v2:
-- Remove LOONGARCH_CSR_PRID and LOONGARCH_CSR_UCAWIN*
-- Modify the patch subject and update the commit message
arch/loongarch/include/asm/loongarch.h | 229 ---------------------------------
1 file changed, 229 deletions(-)
Hi all,
Are you OK with this change? Any comments will be much appreciated.