Re: [PATCH v3 4/5] iommu/io-pgtable-dart: Add DART PTE support for t6000

[Hector Martin]

On 28/06/2022 00.13, Robin Murphy wrote:
> On 2022-06-21 08:18, Janne Grunau wrote:
>> From: Sven Peter <sven@xxxxxxxxxxxxx>
>>
>> The DARTs present in the M1 Pro/Max/Ultra SoC use a diffent PTE format.
>> They support a 42bit physical address space by shifting the paddr and
>> extending its mask inside the PTE.
>> They also come with mandatory sub-page protection now which we just
>> configure to always allow access to the entire page. This feature is
>> already present but optional on the previous DARTs which allows to
>> unconditionally configure it.
>>
>> Signed-off-by: Sven Peter <sven@xxxxxxxxxxxxx>
>> Co-developed-by: Janne Grunau <j@xxxxxxxxxx>
>> Signed-off-by: Janne Grunau <j@xxxxxxxxxx>
>>
>> ---
>>
>> Changes in v3:
>> - apply change to io-pgtable-dart.c
>> - handle pte <> paddr conversion based on the pte format instead of
>>    the output address size
>>
>> Changes in v2:
>> - add APPLE_DART2 PTE format
>>
>>   drivers/iommu/io-pgtable-dart.c | 51 +++++++++++++++++++++++++++------
>>   drivers/iommu/io-pgtable.c      |  1 +
>>   include/linux/io-pgtable.h      |  1 +
>>   3 files changed, 45 insertions(+), 8 deletions(-)
>>
> [...]
>> @@ -536,7 +571,7 @@ apple_dart_alloc_pgtable(struct io_pgtable_cfg *cfg, void *cookie)
>>   	if (!cfg->coherent_walk)
>>   		return NULL;
>>   
>> -	if (cfg->oas > 36)
>> +	if (cfg->oas != 36 && cfg->oas != 42)
>>   		return NULL;
> 
> Wouldn't it make sense to tie this to the format? Maybe 36-bit OAS is 
> still valid with v2, but presumably 42-bit with v1 definitely isn't.

FWIW, 36-bit OAS with v2 is valid (this is the case on M2/t8112).

- Hector