Re: [PATCH 1/3] dt-bindings: spi: stm32: Add st,dual-flash property in st,stm32-qspi.yaml

[Krzysztof Kozlowski]

On 09/08/2022 10:52, Patrice CHOTARD wrote:
> Hi Krzystof
> 
> On 8/9/22 07:29, Krzysztof Kozlowski wrote:
>> On 09/08/2022 07:18, Krzysztof Kozlowski wrote:
>>> On 08/08/2022 19:08, Patrice CHOTARD wrote:
>>>> Hi Krzystof
>>>>
>>>> On 8/8/22 11:01, Krzysztof Kozlowski wrote:
>>>>> On 08/08/2022 10:40, patrice.chotard@xxxxxxxxxxx wrote:
>>>>>> From: Patrice Chotard <patrice.chotard@xxxxxxxxxxx>
>>>>>>
>>>>>> Add new property st,dual-flash which allows to use the QSPI interface as a
>>>>>> communication channel using up to 8 qspi line.
>>>>>> This mode can only be used if cs-gpios property is defined.
>>>>>>
>>>>>> Signed-off-by: Patrice Chotard <patrice.chotard@xxxxxxxxxxx>
>>>>>> ---
>>>>>>  Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml | 8 ++++++++
>>>>>>  1 file changed, 8 insertions(+)
>>>>>>
>>>>>> diff --git a/Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml b/Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml
>>>>>> index 6ec6f556182f..5e4f9109799e 100644
>>>>>> --- a/Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml
>>>>>> +++ b/Documentation/devicetree/bindings/spi/st,stm32-qspi.yaml
>>>>>> @@ -46,6 +46,14 @@ properties:
>>>>>>        - const: tx
>>>>>>        - const: rx
>>>>>>  
>>>>>> +  st,dual-flash:
>>>>>> +    type: boolean
>>>>>> +    description:
>>>>>> +      Allows to use 8 data lines in case cs-gpios property is defined.
>>>>>
>>>>> It's named dual-flash, but what if you want to use QSPI to connect for
>>>>> example to FPGA?
>>>>>
>>>>> Also how is this related to parallel-memories property?
>>>>
>>>> I called it "dual-flash" simply because it enable the dual flash feature of the QSPI block (bit CR_DFM : Dual Flash Mode)
>>>> which allows to use the 8 lines simultaneously of our dual QSPI block.
>>>
>>> And how is it related to existing parallel-memories property?
>>
>> Maybe I was not specific enough, so let me rephrase - we have already
>> parallel-memories property. How this one is different (to justify the
>> new property)? Is just one memory connected in your case to QSPI over 8
>> data lines?
> 
> Our QSPI block is a dual Quad-SPI memory interface, it can managed 2 QSPI flashes independently.
> There is a specific mode, dual flash mode, where the 2 QSPI flashes can be accessed simultaneously 
> using 8 data lines. In this case, both throughput and capacity are two fold with this mode.
> 
> To illustrate, you can have a look at STM32MP157 reference manual (chapter 27.3.1 figure 172) available here:
> https://www.st.com/resource/en/reference_manual/rm0436-stm32mp157-advanced-armbased-32bit-mpus-stmicroelectronics.pdf 
> 
> As you mentioned above, the goal is to connect a FPGA to this 8 lines bus.
> 
> Hope it clarifies enough ;-)

Only partially. Based on the explanation above, it looks like you want
to use existing parallel-memories property. Please use that one, instead
of adding a new property for the same feature.

Best regards,
Krzysztof