Re: [PATCH] arm64: Fix match_list for erratum 1286807 on Arm Cortex-A76

[Will Deacon]

On Tue, Aug 09, 2022 at 07:08:07AM +0100, Marc Zyngier wrote:
> On 2022-08-09 05:38, Zenghui Yu wrote:
> > Since commit 51f559d66527 ("arm64: Enable repeat tlbi workaround on
> > KRYO4XX
> > gold CPUs"), we failed to detect erratum 1286807 on Cortex-A76 because
> > its
> > entry in arm64_repeat_tlbi_list[] was accidently corrupted by this
> > commit.
> > 
> > Fix this issue by creating a separate entry for Kryo4xx Gold.
> > 
> > Fixes: 51f559d66527 ("arm64: Enable repeat tlbi workaround on KRYO4XX
> > gold CPUs")
> > Cc: Shreyas K K <quic_shrekk@xxxxxxxxxxx>
> > Signed-off-by: Zenghui Yu <yuzenghui@xxxxxxxxxx>
> > ---
> >  arch/arm64/kernel/cpu_errata.c | 2 ++
> >  1 file changed, 2 insertions(+)
> > 
> > diff --git a/arch/arm64/kernel/cpu_errata.c
> > b/arch/arm64/kernel/cpu_errata.c
> > index 7e6289e709fc..0f7e9087d900 100644
> > --- a/arch/arm64/kernel/cpu_errata.c
> > +++ b/arch/arm64/kernel/cpu_errata.c
> > @@ -208,6 +208,8 @@ static const struct arm64_cpu_capabilities
> > arm64_repeat_tlbi_list[] = {
> >  #ifdef CONFIG_ARM64_ERRATUM_1286807
> >  	{
> >  		ERRATA_MIDR_RANGE(MIDR_CORTEX_A76, 0, 0, 3, 0),
> > +	},
> > +	{
> >  		/* Kryo4xx Gold (rcpe to rfpe) => (r0p0 to r3p0) */
> >  		ERRATA_MIDR_RANGE(MIDR_QCOM_KRYO_4XX_GOLD, 0xc, 0xe, 0xf, 0xe),
> >  	},
> 
> Ouch. It isn't the first time we end-up with this sort
> of thing, and I wonder whether we should restructure
> the ERRATA_MIDR_* macros to prevent this sort of
> accidental override...

Agreed. I think we may have gone a bit too far with the macros in
cpu_errata.c and cpufeature.c. Although the files would be larger, I think
it would be clearer if we removed some of the abstractions and forced this
stuff to be spelled out each time.

> Anyway, thanks for spotting it!
> 
> Cc: stable@xxxxxxxxxxxxxxx
> Acked-by: Marc Zyngier <maz@xxxxxxxxxx>

I'll queue this as a fix at -rc1 along with any other fixes which come in.

Will