Re: [PATCH v2 1/1] ACPI: CPPC: Disable FIE if registers in PCC regions

[Pierre Gondois]

On 8/10/22 16:37, Lukasz Luba wrote:
> On 8/10/22 15:30, Jeremy Linton wrote:
> > Hi,
> >
> > On 8/10/22 07:29, Lukasz Luba wrote:
> > > Hi Jeremy,
> > >
> > > +CC Valentin since he might be interested in this finding
> > > +CC Ionela, Dietmar
> > >
> > > I have a few comments for this patch.
> > >
> > >
> > > On 7/28/22 23:10, Jeremy Linton wrote:
> > > > PCC regions utilize a mailbox to set/retrieve register values used by
> > > > the CPPC code. This is fine as long as the operations are
> > > > infrequent. With the FIE code enabled though the overhead can range
> > > > from 2-11% of system CPU overhead (ex: as measured by top) on Arm
> > > > based machines.
> > > >
> > > > So, before enabling FIE assure none of the registers used by
> > > > cppc_get_perf_ctrs() are in the PCC region. Furthermore lets also
> > > > enable a module parameter which can also disable it at boot or module
> > > > reload.
> > > >
> > > > Signed-off-by: Jeremy Linton <jeremy.linton@xxxxxxx>
> > > > ---
> > > >    drivers/acpi/cppc_acpi.c       | 41 ++++++++++++++++++++++++++++++++++
> > > >    drivers/cpufreq/cppc_cpufreq.c | 19 ++++++++++++----
> > > >    include/acpi/cppc_acpi.h       |  5 +++++
> > > >    3 files changed, 61 insertions(+), 4 deletions(-)
> > >
> > >
> > > 1. You assume that all platforms would have this big overhead when
> > >      they have the PCC regions for this purpose.
> > >      Do we know which version of HW mailbox have been implemented
> > >      and used that have this 2-11% overhead in a platform?
> > >      Do also more recent MHU have such issues, so we could block
> > >      them by default (like in your code)?
> >
> > I posted that other email before being awake and conflated MHU with AMU
> > (which could potentially expose the values directly). But the CPPC code
> > isn't aware of whether a MHU or some other mailbox is in use. Either
> > way, its hard to imagine a general mailbox with a doorbell/wait for
> > completion handshake will ever be fast enough to consider running at the
> > granularity this code is running at. If there were a case like that, the
> > kernel would have to benchmark it at runtime to differentiate it from
> > something that is talking over a slow link to a slowly responding mgmt
> > processor.
>
> Exactly, I'm afraid the same, that we would never get such fast
> mailbox-based platform. Newer platforms would just use AMU, so
> completely different code and no one would even bother to test if
> their HW mailbox is fast-enough for this FIE purpose ;)

To add some platform information, the following platforms are using
CPPC through PCC channels (so mailboxes):
- Cavium ThunderX2
- Ampere eMAG
- Ampere Altra

Fwiw, I can confirm the cppc_fie kthread can represent a significant load,
with a utilization between 2% and 30%.

Regards,
Pierre