Re: [PATCH] drm/amdgpu: use native mode for dp aux transfer
From: kernel test robot
Date: Thu Aug 11 2022 - 19:43:23 EST
Hi Zhenneng,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-misc/drm-misc-next]
[also build test WARNING on linus/master v5.19 next-20220811]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Zhenneng-Li/drm-amdgpu-use-native-mode-for-dp-aux-transfer/20220811-193443
base: git://anongit.freedesktop.org/drm/drm-misc drm-misc-next
config: i386-allyesconfig (https://download.01.org/0day-ci/archive/20220812/202208120737.JG7NkugC-lkp@xxxxxxxxx/config)
compiler: gcc-11 (Debian 11.3.0-3) 11.3.0
reproduce (this is a W=1 build):
# https://github.com/intel-lab-lkp/linux/commit/1098c6fecb4292d634dbdccff9e720400dc7138d
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Zhenneng-Li/drm-amdgpu-use-native-mode-for-dp-aux-transfer/20220811-193443
git checkout 1098c6fecb4292d634dbdccff9e720400dc7138d
# save the config file
mkdir build_dir && cp config build_dir/.config
make W=1 O=build_dir ARCH=i386 SHELL=/bin/bash drivers/gpu/drm/amd/amdgpu/
If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp@xxxxxxxxx>
All warnings (new ones prefixed by >>):
>> drivers/gpu/drm/amd/amdgpu/amdgpu_dp_auxch.c:73:10: warning: no previous prototype for 'venus_mm_rreg_slow' [-Wmissing-prototypes]
73 | uint32_t venus_mm_rreg_slow(struct amdgpu_device *adev, uint32_t reg)
| ^~~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/amdgpu_dp_auxch.c:84:6: warning: no previous prototype for 'venus_mm_wreg_slow' [-Wmissing-prototypes]
84 | void venus_mm_wreg_slow(struct amdgpu_device *adev, uint32_t reg, uint32_t v)
| ^~~~~~~~~~~~~~~~~~
vim +/venus_mm_rreg_slow +73 drivers/gpu/drm/amd/amdgpu/amdgpu_dp_auxch.c
69
70 #define R100_MM_INDEX 0x0000
71 #define R100_MM_DATA 0x0004
72 #define AMDGPU_MIN_MMIO_SIZE 0x10000
> 73 uint32_t venus_mm_rreg_slow(struct amdgpu_device *adev, uint32_t reg)
74 {
75 unsigned long flags;
76 uint32_t ret;
77
78 spin_lock_irqsave(&adev->mmio_idx_lock, flags);
79 writel(reg, ((void __iomem *)adev->rmmio) + R100_MM_INDEX);
80 ret = readl(((void __iomem *)adev->rmmio) + R100_MM_DATA);
81 spin_unlock_irqrestore(&adev->mmio_idx_lock, flags);
82 return ret;
83 }
> 84 void venus_mm_wreg_slow(struct amdgpu_device *adev, uint32_t reg, uint32_t v)
85 {
86 unsigned long flags;
87
88 spin_lock_irqsave(&adev->mmio_idx_lock, flags);
89 writel(reg, ((void __iomem *)adev->rmmio) + R100_MM_INDEX);
90 writel(v, ((void __iomem *)adev->rmmio) + R100_MM_DATA);
91 spin_unlock_irqrestore(&adev->mmio_idx_lock, flags);
92 }
93 static inline uint32_t venus_mm_rreg(struct amdgpu_device *adev, uint32_t reg,
94 bool always_indirect)
95 {
96 /* The mmio size is 64kb at minimum. Allows the if to be optimized out. */
97 if ((reg < adev->rmmio_size || reg < AMDGPU_MIN_MMIO_SIZE) && !always_indirect)
98 return readl(((void __iomem *)adev->rmmio) + reg);
99 else
100 return venus_mm_rreg_slow(adev, reg);
101 }
102 static inline void venus_mm_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v,
103 bool always_indirect)
104 {
105 if ((reg < adev->rmmio_size || reg < AMDGPU_MIN_MMIO_SIZE) && !always_indirect)
106 writel(v, ((void __iomem *)adev->rmmio) + reg);
107 else
108 venus_mm_wreg_slow(adev, reg, v);
109 }
110
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