Re: [PATCH v2 6/9] clk: samsung: exynos850: Implement CMU_IS domain

[Krzysztof Kozlowski]

On 09/08/2022 14:33, Sam Protsenko wrote:
> CMU_IS clock domain provides clocks for IS IP-core (Image Signal
> Processing Subsystem). According to Exynos850 TRM, CMU_IS generates
> CSIS, IPP, ITP, VRA and GDC clocks for BLK_IS.
> 
> This patch adds next clocks:
>   - bus clocks in CMU_TOP needed for CMU_IS
>   - all internal CMU_IS clocks
>   - leaf clocks for IS IP-core, CSIS (Camera Serial Interface Slave),
>     D_TZPC (TrustZone Protection Controller), CSIS DMA, GDC (Geometric
>     Distortion Correction), IPP (Image Preprocessing Processing core),
>     ITP (Image Texture Processing core), MCSC (Multi-Channel Scaler),
>     VRA (Visual Recognition Accelerator), PPMU (Platform Performance
>     Monitoring Unit), SysMMU and SysReg
> 
> IS related gate clocks in CMU_TOP were marked as CLK_IS_CRITICAL,
> because:
>   1. All of those have to be enabled in order to read
>      /sys/kernel/debug/clk/clk_summary file

This sounds exactly like previous ISP clock hangs:
https://lore.kernel.org/all/20171011092515.1698-1-m.szyprowski@xxxxxxxxxxx/

It looks like missing power domain references and your CLK_IS_CRITICAL
is not correct. These are not critical clocks.

>   2. When some user driver (e.g. exynos-sysmmu) disables some derived
>      leaf clock, it can lead to CMU_TOP clocks disable, which then makes
>      the system hang. To prevent that, the CLK_IS_CRITICAL flag is used,
>      as CLK_IGNORE_UNUSED is not enough.

These are not critical clocks and usage of CLK_IS_CRITICAL is not
appropriate. This looks like the same has as with other ISP, so it
should be handled in similar way.

Best regards,
Krzysztof