[PATCH 5.15 200/779] arm64: dts: qcom: sm6125: Append -state suffix to pinctrl nodes
From: Greg Kroah-Hartman
Date: Mon Aug 15 2022 - 14:38:29 EST
From: Marijn Suijten <marijn.suijten@xxxxxxxxxxxxxx>
[ Upstream commit cbfb5668aece448877fa7826cde81c9d06f4a4ac ]
According to qcom,sm6125-pinctrl.yaml all nodes inside the tlmm must be
suffixed by -state:
qcom/sm6125-sony-xperia-seine-pdx201.dtb: pinctrl@500000: 'sdc2-off', 'sdc2-on' do not match any of the regexes: '-state$', 'pinctrl-[0-9]+'
The label names have been updated to match, going from sdc2_state_X to
sdc2_X_state.
Fixes: cff4bbaf2a2d ("arm64: dts: qcom: Add support for SM6125")
Fixes: 82e1783890b7 ("arm64: dts: qcom: sm6125: Add support for Sony Xperia 10II")
Signed-off-by: Marijn Suijten <marijn.suijten@xxxxxxxxxxxxxx>
Signed-off-by: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx>
Link: https://lore.kernel.org/r/20220508100336.127176-2-marijn.suijten@xxxxxxxxxxxxxx
Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx>
---
.../boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts | 4 ++--
arch/arm64/boot/dts/qcom/sm6125.dtsi | 8 ++++----
2 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts b/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts
index d4f0a15b763d..47f8e5397ebb 100644
--- a/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts
+++ b/arch/arm64/boot/dts/qcom/sm6125-sony-xperia-seine-pdx201.dts
@@ -88,7 +88,7 @@ &hsusb_phy1 {
status = "okay";
};
-&sdc2_state_off {
+&sdc2_off_state {
sd-cd {
pins = "gpio98";
drive-strength = <2>;
@@ -96,7 +96,7 @@ sd-cd {
};
};
-&sdc2_state_on {
+&sdc2_on_state {
sd-cd {
pins = "gpio98";
drive-strength = <2>;
diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi
index cc16c05a2856..f89af5e35112 100644
--- a/arch/arm64/boot/dts/qcom/sm6125.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi
@@ -336,7 +336,7 @@ tlmm: pinctrl@500000 {
interrupt-controller;
#interrupt-cells = <2>;
- sdc2_state_off: sdc2-off {
+ sdc2_off_state: sdc2-off-state {
clk {
pins = "sdc2_clk";
drive-strength = <2>;
@@ -356,7 +356,7 @@ data {
};
};
- sdc2_state_on: sdc2-on {
+ sdc2_on_state: sdc2-on-state {
clk {
pins = "sdc2_clk";
drive-strength = <16>;
@@ -437,8 +437,8 @@ sdhc_2: sdhci@4784000 {
<&xo_board>;
clock-names = "iface", "core", "xo";
- pinctrl-0 = <&sdc2_state_on>;
- pinctrl-1 = <&sdc2_state_off>;
+ pinctrl-0 = <&sdc2_on_state>;
+ pinctrl-1 = <&sdc2_off_state>;
pinctrl-names = "default", "sleep";
bus-width = <4>;
--
2.35.1