Re: [PATCH v1] regmap: introduce value tracing for regmap bulk operations

[Dmitry Rokosov]

On Fri, Aug 19, 2022 at 03:38:27PM +0100, Mark Brown wrote:
> On Fri, Aug 19, 2022 at 03:25:44PM +0100, Marc Zyngier wrote:
> > On 2022-08-18 16:43, Mark Brown wrote:
> > > On Thu, Aug 18, 2022 at 02:49:20PM +0100, Marc Zyngier wrote:
> 
> > > > I don't care much about regmap as a MMIO backend, but it strikes me as
> > > > odd that you end up with multiple ways of logging the same stuff (with
> > > > a memcpy in the middle of it).
> 
> > > > Why can't this be done with a small amount of trace post-processing?
> 
> > > At the minute we don't put the actual data for the bulk transfers into
> > > the trace so the information simply isn't there.
> 
> > But isn't that what this patch should do?
> 
> I'd imagine so based on a quick glance at the description, I've not
> actually reviewed it yet, but in that case I'm not sure what your
> concern is here?
> 
> > We also have recently merged the CONFIG_TRACE_MMIO_ACCESS which
> > already dumps all sort of MMIO crap^Winformation.
> 
> Yes, that'd also cover it for MMIO based regmaps when enabled but
> obviously other buses exist and can also be accessed via regmap.
> 
> > Surely there should be a more common approach to this.
> 
> There's an argument for tracing at each abstraction layer since they're
> generally all doing *something*, people will look to the layer they're
> accessing and for things like tracing register accesses with buses like
> I2C and SPI regmap is adding the register semantics on top of a bus
> that's just a byte stream.  Even on buses with a native concept of an
> address there's stuff like paging which might be added on depending on
> the device.  They should probably all follow a similar pattern but I'm
> not sure we can do everything at once.

Oh, I see what you mean. Actually, I tested my patch only on I2C-regmap
abstraction only. I thought on the regmap level, it doesn't matter how
byte stream will be interleaved on the bus layer. On the other hand, from
a developer's perspective, we want to see a real bus stream trace with
already rearranged data chunks...

-- 
Thank you,
Dmitry