Re: [PATCH v3] arm64: errata: add detection for AMEVCNTR01 incrementing incorrectly

[Will Deacon]

On Fri, 19 Aug 2022 11:30:50 +0100, Ionela Voinescu wrote:
> The AMU counter AMEVCNTR01 (constant counter) should increment at the same
> rate as the system counter. On affected Cortex-A510 cores, AMEVCNTR01
> increments incorrectly giving a significantly higher output value. This
> results in inaccurate task scheduler utilization tracking and incorrect
> feedback on CPU frequency.
> 
> Work around this problem by returning 0 when reading the affected counter
> in key locations that results in disabling all users of this counter from
> using it either for frequency invariance or as FFH reference counter. This
> effect is the same to firmware disabling affected counters.
> 
> [...]

Applied to arm64 (for-next/fixes), thanks!

[1/1] arm64: errata: add detection for AMEVCNTR01 incrementing incorrectly
      https://git.kernel.org/arm64/c/e89d120c4b72

Cheers,
-- 
Will

https://fixes.arm64.dev
https://next.arm64.dev
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