Re: [PATCH 4/4] net: mediatek: sgmii: set the speed according to the phy interface in AN
From: Russell King (Oracle)
Date: Tue Aug 23 2022 - 13:40:06 EST
On Sun, Aug 21, 2022 at 12:45:38AM +0200, Alexander Couzens wrote:
> The non auto-negotiating code path is setting the correct speed for the
> interface. Ensure auto-negotiation code path is doing it as well.
>
> Signed-off-by: Alexander Couzens <lynxis@xxxxxxx>
> ---
> drivers/net/ethernet/mediatek/mtk_sgmii.c | 11 +++++++++--
> 1 file changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/net/ethernet/mediatek/mtk_sgmii.c b/drivers/net/ethernet/mediatek/mtk_sgmii.c
> index aa69baf1a42f..75de2c73a048 100644
> --- a/drivers/net/ethernet/mediatek/mtk_sgmii.c
> +++ b/drivers/net/ethernet/mediatek/mtk_sgmii.c
> @@ -21,13 +21,20 @@ static struct mtk_pcs *pcs_to_mtk_pcs(struct phylink_pcs *pcs)
> }
>
> /* For SGMII interface mode */
> -static int mtk_pcs_setup_mode_an(struct mtk_pcs *mpcs)
> +static int mtk_pcs_setup_mode_an(struct mtk_pcs *mpcs, phy_interface_t interface)
> {
> unsigned int val;
>
> /* PHYA power down */
> regmap_write(mpcs->regmap, SGMSYS_QPHY_PWR_STATE_CTRL, SGMII_PHYA_PWD);
>
> + /* Set SGMII phy speed */
> + regmap_read(mpcs->regmap, mpcs->ana_rgc3, &val);
> + val &= ~RG_PHY_SPEED_MASK;
> + if (interface == PHY_INTERFACE_MODE_2500BASEX)
> + val |= RG_PHY_SPEED_3_125G;
> + regmap_write(mpcs->regmap, mpcs->ana_rgc3, val);
> +
It looks to me like, after this commit, the initial part of
mtk_pcs_setup_mode_an() and mtk_pcs_setup_mode_force() are identical.
Also, I think that the tail of each of these functions is also
identical.
So, would it make sense for a final patch to tidy this code up?
> /* Setup the link timer and QPHY power up inside SGMIISYS */
> regmap_write(mpcs->regmap, SGMSYS_PCS_LINK_TIMER,
> SGMII_LINK_TIMER_DEFAULT);
> @@ -100,7 +107,7 @@ static int mtk_pcs_config(struct phylink_pcs *pcs, unsigned int mode,
> if (interface != PHY_INTERFACE_MODE_SGMII)
> err = mtk_pcs_setup_mode_force(mpcs, interface);
> else if (phylink_autoneg_inband(mode))
> - err = mtk_pcs_setup_mode_an(mpcs);
> + err = mtk_pcs_setup_mode_an(mpcs, interface);
What is the situation when PHY_INTERFACE_MODE_SGMII is being used, but
we're not using inband mode? Right now, we don't do any configuration
of this block, and that seems rather wrong.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
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