Re: [RFC PATCH 8/9] cxl/test: Add specific events

From: Jonathan Cameron
Date: Thu Aug 25 2022 - 07:38:04 EST


On Fri, 12 Aug 2022 22:32:42 -0700
ira.weiny@xxxxxxxxx wrote:

> From: Ira Weiny <ira.weiny@xxxxxxxxx>
>
> Each type of event has different trace point outputs.
>
> Add mock General Media Event, DRAM event, and Memory Module Event
> records to the mock list of events returned.
>
> Signed-off-by: Ira Weiny <ira.weiny@xxxxxxxxx>
> ---
> tools/testing/cxl/test/mem.c | 70 ++++++++++++++++++++++++++++++++++++
> 1 file changed, 70 insertions(+)
>
> diff --git a/tools/testing/cxl/test/mem.c b/tools/testing/cxl/test/mem.c
> index 87196d62acf5..c5d7857ae2e5 100644
> --- a/tools/testing/cxl/test/mem.c
> +++ b/tools/testing/cxl/test/mem.c
> @@ -391,6 +391,70 @@ struct cxl_event_record_raw hardware_replace = {
> .data = { 0xDE, 0xAD, 0xBE, 0xEF },
> };
>
> +struct cxl_evt_gen_media gen_media = {
> + .hdr = {
> + .id = UUID_INIT(0xfbcd0a77, 0xc260, 0x417f,
> + 0x85, 0xa9, 0x08, 0x8b, 0x16, 0x21, 0xeb, 0xa6),
> + .flags_length = cpu_to_le32((CXL_EVENT_RECORD_FLAG_PERMANENT << 8) |
> + sizeof(struct cxl_evt_gen_media)),
> + /* .handle = Set dynamically */
> + .related_handle = cpu_to_le16(0),
> + },
> + .phys_addr = cpu_to_le64(0x2000),
> + .descriptor = CXL_GMER_EVT_DESC_UNCORECTABLE_EVENT,
> + .type = CXL_GMER_MEM_EVT_TYPE_DATA_PATH_ERROR,
> + .transaction_type = CXL_GMER_TRANS_HOST_WRITE,
> + .validity_flags = cpu_to_le16(CXL_GMER_VALID_CHANNEL |
> + CXL_GMER_VALID_RANK),

No actual affect (I think: __put_unaligned_t is basically
forcing a packed structure element) , but put_unaligned_le16() would
make it clear this is unaligned?


> + .channel = 1,
> + .rank = 30
> +};
> +
> +struct cxl_evt_dram_rec dram_rec = {
> + .hdr = {
> + .id = UUID_INIT(0x601dcbb3, 0x9c06, 0x4eab,
> + 0xb8, 0xaf, 0x4e, 0x9b, 0xfb, 0x5c, 0x96, 0x24),
> + .flags_length = cpu_to_le32((CXL_EVENT_RECORD_FLAG_PERF_DEGRADED << 8) |
> + sizeof(struct cxl_evt_dram_rec)),
> + /* .handle = Set dynamically */
> + .related_handle = cpu_to_le16(0),
> + },
> + .phys_addr = cpu_to_le64(0x8000),
> + .descriptor = CXL_GMER_EVT_DESC_THRESHOLD_EVENT,
> + .type = CXL_GMER_MEM_EVT_TYPE_INV_ADDR,
> + .transaction_type = CXL_GMER_TRANS_INTERNAL_MEDIA_SCRUB,
> + .validity_flags = cpu_to_le16(CXL_DER_VALID_CHANNEL |
> + CXL_DER_VALID_BANK_GROUP |
> + CXL_DER_VALID_BANK |
> + CXL_DER_VALID_COLUMN),
> + .channel = 1,
> + .bank_group = 5,
> + .bank = 2,
> + .column = cpu_to_le16(1024)
> +};
> +
> +struct cxl_evt_mem_mod_rec mem_mod_rec = {
> + .hdr = {
> + .id = UUID_INIT(0xfe927475, 0xdd59, 0x4339,
> + 0xa5, 0x86, 0x79, 0xba, 0xb1, 0x13, 0xb7, 0x74),
> + .flags_length = cpu_to_le32(sizeof(struct cxl_evt_mem_mod_rec)),
> + /* .handle = Set dynamically */
> + .related_handle = cpu_to_le16(0),
> + },
> + .event_type = CXL_MMER_TEMP_CHANGE,
> + .info = {
> + .health_status = CXL_DHI_HS_PERFORMANCE_DEGRADED,
> + .media_status = CXL_DHI_MS_ALL_DATA_LOST,
> + .add_status = (CXL_DHI_AS_CRITICAL << 2) |

Can we use masks + FIELD_PREP() for these rather than
magic shifts here?

> + (CXL_DHI_AS_WARNING << 4) |
> + (CXL_DHI_AS_WARNING << 5),
> + .device_temp = cpu_to_le16(1000),
> + .dirty_shutdown_cnt = cpu_to_le32(30000),
> + .cor_vol_err_cnt = cpu_to_le32(30100),
> + .cor_per_err_cnt = cpu_to_le32(40100),
> + }
> +};
> +
> static void devm_cxl_mock_event_logs(struct cxl_memdev *cxlmd)
> {
> struct device *dev = &cxlmd->dev;
> @@ -414,8 +478,14 @@ static void devm_cxl_mock_event_logs(struct cxl_memdev *cxlmd)
> es->cxlds = cxlmd->cxlds;
>
> event_store_add_event(es, CXL_EVENT_TYPE_INFO, &maint_needed);
> + event_store_add_event(es, CXL_EVENT_TYPE_INFO,
> + (struct cxl_event_record_raw *)&gen_media);
> + event_store_add_event(es, CXL_EVENT_TYPE_INFO,
> + (struct cxl_event_record_raw *)&mem_mod_rec);
>
> event_store_add_event(es, CXL_EVENT_TYPE_FATAL, &hardware_replace);
> + event_store_add_event(es, CXL_EVENT_TYPE_FATAL,
> + (struct cxl_event_record_raw *)&dram_rec);
>
> store_event_store(es);
> }