[PATCH v3 0/2] perf: arm64: Kernel support for Dwarf unwinding through SVE functions

[James Clark]

Hi,

I'm resubmitting this with a few of the changes suggested by Will on V2.

I haven't made any changes regarding the open questions about the
discoverability or saving the new reg and passing to output_sample()
because I think it's best to be consistent with the implementations on
other platforms first. I have explained in more detail on v2 [1].

[1]: https://lore.kernel.org/lkml/5fcf1a6f-c8fb-c296-992e-18aae8874095@xxxxxxx/

=======

Changes since v2:

  * Add definition for PERF_REG_EXTENDED_MASK which is needed for
    PERF_PMU_CAP_EXTENDED_REGS to work properly

  * Simplify changes to enum perf_event_arm_regs

Changes since v1:

  * Add Mark's review tag
  * Clarify in docs that it's the SVE register length
  * Split patchset into kernel side and Perf tool changes

=======

When SVE registers are pushed onto the stack the VG register is required to
unwind because the stack offsets would vary by the SVE register width at the
time when the sample was taken.

These first two patches add support for sampling the VG register to the kernel
and the docs. There is another patchset to add support to userspace perf.

A small change is also required to libunwind or libdw depending on which
unwinder is used, and these will be published later. Without these changes Perf
continues to work with both libraries, although the VG register is still not
used for unwinding. 

Thanks
James

James Clark (2):
  perf: arm64: Add SVE vector granule register to user regs
  arm64/sve: Add Perf extensions documentation

 Documentation/arm64/sve.rst             | 20 +++++++++++++++++
 arch/arm64/include/uapi/asm/perf_regs.h |  7 ++++++
 arch/arm64/kernel/perf_regs.c           | 30 +++++++++++++++++++++++--
 drivers/perf/arm_pmu.c                  |  2 +-
 4 files changed, 56 insertions(+), 3 deletions(-)

-- 
2.28.0