Re: [PATCH 2/4] dt-bindings: arm: mediatek: Add new bindings of MediaTek frequency hopping

[Johnson Wang]

On Wed, 2022-08-31 at 16:19 +0300, Krzysztof Kozlowski wrote:
> On 31/08/2022 15:48, Johnson Wang wrote:
> > Add the new binding documentation for MediaTek frequency hopping
> > and spread spectrum clocking control.
> > 
> > Co-developed-by: Edward-JW Yang <edward-jw.yang@xxxxxxxxxxxx>
> > Signed-off-by: Edward-JW Yang <edward-jw.yang@xxxxxxxxxxxx>
> > Signed-off-by: Johnson Wang <johnson.wang@xxxxxxxxxxxx>
> > ---
> >  .../bindings/arm/mediatek/mediatek,fhctl.yaml | 49
> > +++++++++++++++++++
> >  1 file changed, 49 insertions(+)
> >  create mode 100644
> > Documentation/devicetree/bindings/arm/mediatek/mediatek,fhctl.yaml
> > 
> > diff --git
> > a/Documentation/devicetree/bindings/arm/mediatek/mediatek,fhctl.yam
> > l
> > b/Documentation/devicetree/bindings/arm/mediatek/mediatek,fhctl.yam
> > l
> > new file mode 100644
> > index 000000000000..c5d76410538b
> > --- /dev/null
> > +++
> > b/Documentation/devicetree/bindings/arm/mediatek/mediatek,fhctl.yam
> > l
> > @@ -0,0 +1,49 @@
> > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: 
> > https://urldefense.com/v3/__http://devicetree.org/schemas/arm/mediatek/mediatek,fhctl.yaml*__;Iw!!CTRNKA9wMg0ARbw!ysl-bMp7yP9Ym70o6EVB8A36MBxcXGap8doEKR_SbaAQSy8-_RU5jvrWTjzETut_6eXNGut4j-3dY0q7xJdpQbmaOw$
> >  
> > +$schema: 
> > https://urldefense.com/v3/__http://devicetree.org/meta-schemas/core.yaml*__;Iw!!CTRNKA9wMg0ARbw!ysl-bMp7yP9Ym70o6EVB8A36MBxcXGap8doEKR_SbaAQSy8-_RU5jvrWTjzETut_6eXNGut4j-3dY0q7xJezt7_RBw$
> >  
> > +
> > +title: MediaTek frequency hopping and spread spectrum clocking
> > control
> > +
> > +maintainers:
> > +  - Edward-JW Yang <edward-jw.yang@xxxxxxxxxxxx>
> > +
> > +description: |
> > +  Frequency hopping control (FHCTL) is a piece of hardware that
> > control
> > +  some PLLs to adopt "hopping" mechanism to adjust their
> > frequency.
> > +  Spread spectrum clocking (SSC) is another function provided by
> > this hardware.
> > +
> > +properties:
> > +  compatible:
> > +    const: mediatek,fhctl
> 
> You need SoC/device specific compatibles. Preferably only SoC
> specific,
> without generic fallback, unless you can guarantee (while
> representing
> MediaTek), that generic fallback will cover all of their SoCs?
> 

Hi Krzysztof,

At this moment, we plan to support FHCTL feature for MT8186 only.

If you prefer SoC-specific compatble, we will improve that in the next
version.

Thanks for your suggestion.

BRs,
Johnson Wang
> > +
> > +  reg:
> > +    maxItems: 1
> > +
> > +  mediatek,hopping-ssc-percents:
> > +    description: |
> > +      Determine the enablement of frequency hopping feature and
> > the percentage
> > +      of spread spectrum clocking for PLLs.
> > +    $ref: /schemas/types.yaml#/definitions/uint32-matrix
> > +    items:
> > +      items:
> > +        - description: PLL id that is expected to enable frequency
> > hopping.
> 
> So the clocks are indices from some specific, yet unnamed
> clock-controller? This feels hacky. You should rather take here clock
> phandles (1) or integrate it into specific clock controller (2). The
> reason is that either your device does something on top of existing
> clocks (option 1, thus it takes clock as inputs) or it modifies
> existing
> clocks (option 2, thus it is integral part of clock-controller).
> 
> 
> Best regards,
> Krzysztof