Re: [v3 PATCH 1/1] gpio: exar: access MPIO registers on cascaded chips

[Bartosz Golaszewski]

On Fri, Sep 2, 2022 at 8:15 AM Qingtao Cao <qingtao.cao.au@xxxxxxxxx> wrote:
>
> When EXAR xr17v35x chips are cascaded in order to access the MPIO registers
> (part of the Device Configuration Registers) of the secondary chips, an offset
> needs to be applied based on the number of primary chip's UART channels.
>
> Signed-off-by: Qingtao Cao <qingtao.cao@xxxxxxxx>
> ---

Applied, thanks!

Bart