Re: [PATCH v2 2/3] KVM: x86/pmu: Limit the maximum number of supported Intel GP counters

[Jim Mattson]

On Wed, Sep 7, 2022 at 3:49 AM Like Xu <like.xu.linux@xxxxxxxxx> wrote:
>
> From: Like Xu <likexu@xxxxxxxxxxx>
>
> The Intel Architectural IA32_PMCx MSRs addresses range allows for
> a maximum of 8 GP counters. A local macro (named KVM_INTEL_PMC_MAX_GENERIC)
> is introduced to take back control of this virtual capability to avoid
> errors introduced by the out-of-bound counter emulations.
>
> Suggested-by: Jim Mattson <jmattson@xxxxxxxxxx>
> Signed-off-by: Like Xu <likexu@xxxxxxxxxxx>

Reviewed-by: Jim Mattson <jmattson@xxxxxxxxxx>