Re: [PATCH] ARM: dts: lan966x: Fix the interrupt number for internal PHYs

[Michael Walle]

Am 2022-09-13 09:57, schrieb Horatiu Vultur:
> > Accoring to Table 3-155: Shared Peripheral Interrupts
> > There are ID47 and ID48 listed as "MIIM controller 0 interrupt".
> > Whatever that is, because the internal PHYs are on MIIM
> > controller 1.
> >
> > But 80 and 81 would be ID48 and ID49. Did you test the
> > interrupts?
>
> Looking the same table (3-155) in the documentation that I have these
> interrupts correspond to ID112 and ID113 (Embedded CuPHY port 0/1 
> interrupt).
> And because these are shared peripheral interrupts, it is required to
> substract 32. Therefore I got the numbers 80 and 81.

Ahh, I need more coffee :) Yes you are right.

> As the internal PHYs don't have yet interrupt support, I have sent a
> patch here [1] and I have tested it with this.
>
> [1] https://www.spinics.net/lists/kernel/msg4511731.html

Thanks for the pointer!

-michael