Re: [PATCH] dt-bindings: pci: qcom,pcie-ep: correct qcom,perst-regs

[Krzysztof Kozlowski]

On 13/09/2022 17:20, Rob Herring wrote:
> On Sun, Sep 11, 2022 at 04:14:54PM +0200, Krzysztof Kozlowski wrote:
>> On 11/09/2022 15:55, Krzysztof Kozlowski wrote:
>>> qcom,perst-regs is an phandle array of one item with a phandle and its
>>> arguments.
>>>
>>> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
>>> ---
>>>  Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml | 6 ++++--
>>>  1 file changed, 4 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
>>> index 3d23599e5e91..077e002b07d3 100644
>>> --- a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
>>> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml
>>> @@ -60,8 +60,10 @@ properties:
>>>                   enable registers
>>>      $ref: "/schemas/types.yaml#/definitions/phandle-array"
>>>      items:
>>> -      minItems: 3
>>> -      maxItems: 3
>>> +      - items:
>>> +          - description: Syscon to TCSR system registers
>>> +          - description: Perst enable offset
>>> +          - description: Perst separateion enable offset
>>
>> Unfortunately this still complains:
>>
>> qcom-sdx55-t55.dtb: pcie-ep@40000000: qcom,perst-regs:0: [28] is too short
>>
>>
>> where 28 is the phandle...
> 
> Meaning the dt is wrong or there's a tooling issue?

I think tooling issue. I looked at this many times and code (schema and
DTS) seems to be correct, but tool doesn't like it.


Best regards,
Krzysztof