RE: [PATCH v2 1/1] iommu/vt-d: Decouple PASID & PRI enabling from SVA

[Tian, Kevin]

> From: Lu Baolu <baolu.lu@xxxxxxxxxxxxxxx>
> Sent: Thursday, September 15, 2022 4:58 PM
> 
> Previously the PCI PASID and PRI capabilities are enabled in the path of
> iommu device probe only if INTEL_IOMMU_SVM is configured and the device
> supports ATS. As we've already decoupled the I/O page fault handler from
> SVA, we could also decouple PASID and PRI enabling from it to make room
> for growth of new features like kernel DMA with PASID, SIOV and nested
> translation.
> 
> At the same time, the iommu_enable_dev_iotlb() helper is also called in
> iommu_dev_enable_feature(dev, IOMMU_DEV_FEAT_SVA) path. It's
> unnecessary
> and duplicate. This cleanups this helper to make the code neat.
> 
> Signed-off-by: Lu Baolu <baolu.lu@xxxxxxxxxxxxxxx>

Reviewed-by: Kevin Tian <kevin.tian@xxxxxxxxx>