Re: [PATCH v2] dt-bindings: clock: convert rockchip,rk3128-cru.txt to YAML

From: Krzysztof Kozlowski
Date: Sun Sep 18 2022 - 05:11:06 EST


On 17/09/2022 20:42, Johan Jonker wrote:
> Convert rockchip,rk3128-cru.txt to YAML.
>
> Signed-off-by: Johan Jonker <jbx6244@xxxxxxxxx>
> ---
>
> Changed V2:
> Use SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> Add more clocks
>
> ---
>
> Rockchip recently replied on other clock-patches to dual-license the
> binding.
>
> https://lore.kernel.org/all/510d1180-bc8e-7820-c772-ed7f35447087@xxxxxxxxxxxxxx/
> From Finley with an @rock-chips.com address, so this should be ok.
>
> Document history:
>
> git log Documentation/devicetree/bindings/clock/*rk312*.txt
>
> Author: Elaine Zhang <zhangqing@xxxxxxxxxxxxxx>
> dt-bindings: add documentation for rk3126 clock
> Author: Elaine Zhang <zhangqing@xxxxxxxxxxxxxx>
> dt-bindings: add bindings for rk3128 clock controller
> ---
> .../bindings/clock/rockchip,rk3128-cru.txt | 58 ---------------
> .../bindings/clock/rockchip,rk3128-cru.yaml | 74 +++++++++++++++++++
> 2 files changed, 74 insertions(+), 58 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.txt
> create mode 100644 Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.yaml
>
> diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.txt b/Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.txt
> deleted file mode 100644
> index 6f8744fd301b..000000000000
> --- a/Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.txt
> +++ /dev/null
> @@ -1,58 +0,0 @@
> -* Rockchip RK3126/RK3128 Clock and Reset Unit
> -
> -The RK3126/RK3128 clock controller generates and supplies clock to various
> -controllers within the SoC and also implements a reset controller for SoC
> -peripherals.
> -
> -Required Properties:
> -
> -- compatible: should be "rockchip,rk3126-cru" or "rockchip,rk3128-cru"
> - "rockchip,rk3126-cru" - controller compatible with RK3126 SoC.
> - "rockchip,rk3128-cru" - controller compatible with RK3128 SoC.
> -- reg: physical base address of the controller and length of memory mapped
> - region.
> -- #clock-cells: should be 1.
> -- #reset-cells: should be 1.
> -
> -Optional Properties:
> -
> -- rockchip,grf: phandle to the syscon managing the "general register files"
> - If missing pll rates are not changeable, due to the missing pll lock status.
> -
> -Each clock is assigned an identifier and client nodes can use this identifier
> -to specify the clock which they consume. All available clocks are defined as
> -preprocessor macros in the dt-bindings/clock/rk3128-cru.h headers and can be
> -used in device tree sources. Similar macros exist for the reset sources in
> -these files.
> -
> -External clocks:
> -
> -There are several clocks that are generated outside the SoC. It is expected
> -that they are defined using standard clock bindings with following
> -clock-output-names:
> - - "xin24m" - crystal input - required,
> - - "ext_i2s" - external I2S clock - optional,
> - - "gmac_clkin" - external GMAC clock - optional
> -
> -Example: Clock controller node:
> -
> - cru: cru@20000000 {
> - compatible = "rockchip,rk3128-cru";
> - reg = <0x20000000 0x1000>;
> - rockchip,grf = <&grf>;
> -
> - #clock-cells = <1>;
> - #reset-cells = <1>;
> - };
> -
> -Example: UART controller node that consumes the clock generated by the clock
> - controller:
> -
> - uart2: serial@20068000 {
> - compatible = "rockchip,serial";
> - reg = <0x20068000 0x100>;
> - interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
> - clock-frequency = <24000000>;
> - clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
> - clock-names = "sclk_uart", "pclk_uart";
> - };
> diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.yaml b/Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.yaml
> new file mode 100644
> index 000000000000..b77aec3a6f8d
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/rockchip,rk3128-cru.yaml
> @@ -0,0 +1,74 @@
> +# SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/rockchip,rk3128-cru.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Rockchip RK3126/RK3128 Clock and Reset Unit (CRU)
> +
> +maintainers:
> + - Elaine Zhang <zhangqing@xxxxxxxxxxxxxx>
> + - Heiko Stuebner <heiko@xxxxxxxxx>
> +
> +description: |
> + The RK3126/RK3128 clock controller generates and supplies clock to various
> + controllers within the SoC and also implements a reset controller for SoC
> + peripherals.
> + Each clock is assigned an identifier and client nodes can use this identifier
> + to specify the clock which they consume. All available clocks are defined as
> + preprocessor macros in the dt-bindings/clock/rk3128-cru.h headers and can be
> + used in device tree sources. Similar macros exist for the reset sources in
> + these files.
> +
> +properties:
> + compatible:
> + enum:
> + - rockchip,rk3126-cru
> + - rockchip,rk3128-cru
> +
> + reg:
> + maxItems: 1
> +
> + "#clock-cells":
> + const: 1
> +
> + "#reset-cells":
> + const: 1
> +
> + clocks:
> + minItems: 1
> + maxItems: 3
> +
> + clock-names:
> + minItems: 1
> + maxItems: 3
> + items:
> + enum:
> + - xin24m

xin24m is required thus it should be first and in fixed position. enum
is applicable only for next two items.



Best regards,
Krzysztof