Re: [PATCH V4 0/3] PCI: designware-ep: Fix DBI access before core init

From: Bjorn Helgaas
Date: Mon Sep 19 2022 - 18:40:25 EST


On Tue, Sep 20, 2022 at 12:03:39AM +0530, Vidya Sagar wrote:
> This series attempts to fix the issue with core register (Ex:- DBI) accesses
> causing system hang issues in platforms where there is a dependency on the
> availability of PCIe Reference clock from the host for their core
> initialization.
> This series is verified on Tegra194 & Tegra234 platforms.

I think this design is just kind of weird, specifically, the fact that
setting .core_init_notifier makes dw_pcie_ep_init() bail out early.
The usual pattern is more like "if the specific driver sets this
function pointer, the generic code calls it."

The name "dw_pcie_ep_init_complete()" is not as helpful as it could
be: it tells us something about what has happened before this point,
but it doesn't tell us anything about what dw_pcie_ep_init_complete()
*does*.

Same thing with dw_pcie_ep_init_notify() -- it doesn't tell us
anything about what the function *does*. I see that it calls
pci_epc_init_notify(), which calls a notifier call chain (currently
always empty except for a test case). I think pci_epc_linkup() is a
better name because it says something about what's happening: the link
is now up and we're telling somebody about it. "pci_epc_init_notify()"
doesn't convey that. "pci_epc_core_initialized()" might.

It looks like both qcom and tegra wait for an interrupt before calling
dw_pcie_ep_init_notify(), but I'm a little concerned because I can't
figure out what specifically they do to start the process that
ultimately generates the interrupt. Presumably they request the IRQ
*before* starting the process, but there's not much between the
devm_request_threaded_irq() and the interrupt handler, which makes me
wonder if both are racy.

> Manivannan, could you please verify on qcom platforms?
>
> V4:
> * Addressed review comments from Bjorn and Manivannan
> * Added .ep_init_late() ops
> * Added patches to refactor code in qcom and tegra platforms
>
> Vidya Sagar (3):
> PCI: designware-ep: Fix DBI access before core init
> PCI: qcom-ep: Refactor EP initialization completion
> PCI: tegra194: Refactor EP initialization completion
>
> .../pci/controller/dwc/pcie-designware-ep.c | 112 ++++++++++--------
> drivers/pci/controller/dwc/pcie-designware.h | 10 +-
> drivers/pci/controller/dwc/pcie-qcom-ep.c | 27 +++--
> drivers/pci/controller/dwc/pcie-tegra194.c | 4 +-
> 4 files changed, 85 insertions(+), 68 deletions(-)
>
> --
> 2.17.1
>